Table of Contents
Advertisement
LVDS Input characteristics
1.
DC Specification
Description
LVDS differential voltage
LVDS common mode voltage
LVDS input voltage range
Change in common mode voltage
Note!
Does not have any noise & peaking in LVDS signal.
2.
AC Specification
Description
LVDS Clock to Data Skew
Margin
LVDS Clock to Clock Skew
Margin (Even to Odd)
Symbol
Min
|V
|
200
ID
V
1.0
CM
V
0.7
IN
V
-
CM
Symbol
Min
Max
t
- 300
+ 300
SKEW
t
- 400
+ 400
SKEW
t
- 600
+ 600
SKEW
t
- 1/7
+ 1/7
SKEW_EO
11
Max
Unit
Notes
600
mV
-
1.5
V
-
1.8
V
-
250
mV
-
Unit
Notes
ps
95MHz > Fclk ≥ 85MHz
ps
85MHz > Fclk ≥ 65MHz
ps
65MHz > Fclk ≥ 30MHz
T
-
clk
IDK-1121WP User Manual
Advertisement
Table of Contents
