Lattice Semiconductor ECP5 Versa User Manual
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Lattice Semiconductor ECP5 Versa User Manual

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ECP5 Versa Development Board User Guide
FPGA-EB-02021 Version 2.3, September 2018

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Summary of Contents for Lattice Semiconductor ECP5 Versa

  • Page 1 ECP5 Versa Development Board User Guide FPGA-EB-02021 Version 2.3, September 2018...
  • Page 2 ECP5 Field-Programmable Gate Array. The features of the ECP5 Versa Development Board can assist engineers with rapid prototyping and testing of their specific designs. The ECP5 Versa Development Board is part of the ECP5 Versa Development Kit. The guide is intended to be referenced in conjunction with demo user guides to demonstrate the ECP5 FPGA.

  • Page 3: Ecp5 Device

    Note: The connections referenced in this document refer to the LFE5UM-45F-8BG381C device. Applying Power to the Board The ECP5 Versa Development Board is ready to power on. The board can be supplied with power from a PCI Express host system or standalone with an external wall power module.

  • Page 4: Programming/Fpga Configuration

    USB Type-B connector and a USB UART device. To use the built-in download cable, simply connect a standard USB cable (a USB-B to USB-A cable is included with the ECP5 Versa Development Kit) from J2 to your PC (with Diamond programming software installed). The USB hub on the PC will detect the addition of the USB function, making the built-in cable available for use with the Diamond programming software.

  • Page 5: Setting The Configuration Mode

    ® ECP5 Versa Development Board Setting the Configuration Mode The ECP5 device on the ECP5 Versa Development Board supports a variety of configuration modes, including 1149.1 JTAG and Master SPI. Refer to TN1260, ECP5 sysCONFIG Usage Guide. On the PCB version Rev B, use the CFG Setting Dip Switch SW4 described in Table 3.

  • Page 6: Programn And Gsrn

    The Serial SPI Flash memory device can be configured easily via the ECP5 JTAG port. This mode enables the FPGA to be programmed at power-up or assertion of PROGRAMN with a bitstream stored in the memory device. 1. Connect the ECP5 Versa Development Board. 2. Scan the board or select the LFE5UM-45F device in the ECP5UM device family.
  • Page 7 ® ECP5 Versa Development Board Figure 5. Device Properties Dialog Box 5. Click OK in the Device Properties dialog box. You will return to the main configuration screen. 6. Set J50 jumper to ECP5 programming (see Appendix A, sheet 3 "Programming").

  • Page 8: On-Board Clock Capabilities

    (See Appendix A, Sheet 9, Figure 18 - Reference Clock Generator) The ECP5 Versa Development Board allows for several clock source options. Some of these options are controlled via the ispClock5406D programmable clock manager device. The ispClock5406D enables the reference clock from the PCI Express interface to provide a reference clock to the SERDES.

  • Page 9: General Purpose Clock Source

    The PCI Express add-in card specification requires add-in boards to include capabilities to tell the host of its pres- ence. The ECP5 Versa Development Board allows this optional connection via a board jumper. Using the board with a PCI Express host requires the setting shown in Figure 7 below.

  • Page 10: Fpga Test Pins

    Figure 9 shows the switches. Note the silk marking associated with SW3-7 is incorrect in revision B, SW3-7 is mapped to K19, per Table 6. Figure 8. ECP5 Versa Development Board LEDs and Switches The designated pins are connected according to Table 6.

  • Page 11: General Purpose Leds

    (See Appendix A, Sheet 8, Figure 17 - LEDs and Switches) The LEDs provided on the ECP5 Versa Development Board are connected to general purpose FPGA I/Os. These LEDs provide status for user designs and must be included in the design. The LEDs illuminate when the FPGA out- put is driven LOW.

  • Page 12: Ddr3 Memory Device

    DDR3 Memory Device (See Appendix A, Sheet 7, Figure 16 - DDR3 Memory) • The ECP5 Versa Development Board is equipped with an SDRAM memory device (1.5 V, 64 Mb/x16, 96-ball FBGA, 933 MHz, DDR3-1866) such as the Micron MT41K64M16TW-107:J device.
  • Page 13 ® ECP5 Versa Development Board Table 9. DDR3 Memory Controller Interconnections FPGA Ball FPGA Ball DDR3 Signal Number DDR3 Signal Number DQ10 DQ11 DQ12 DQ13 DQ14 K_0# DQ15 CAS# DQS0 DQS0# DQS1 DQS1# CS0# RAS# CLKP VREF CLKN RST#...

  • Page 14: Ethernet Interfaces

    ® ECP5 Versa Development Board Ethernet Interfaces (See Appendix A, sheets 5 and 6 "10/100/1000-T PHY#x/RJ45") Two Marvell 88E1512 Gigabit Ethernet transceiver devices (U14 and U15) are included on the board. These phys- ical layer devices support 1000BASE-T, 100BASE-TX, and 10BASE-T applications via a standard media interface to a dual RJ45 connection.
  • Page 15 ® ECP5 Versa Development Board Table 12. Expansion Connections X3 Expansion Connector X4 Expansion Connector FPGA Ball FPGA Ball Signal Number Signal Number — RESOUT# — — — IO29 IO30 IO31 IO32 IO33 IO34 IO35 IO36 IO37 IO38 IO10 IO39...

  • Page 16: Ordering Information

    March 2015 Initial release. © 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

  • Page 17: Appendix A. Schematics

    ® ECP5 Versa Development Board Appendix A. Schematics Figure 10. Board Block Design...
  • Page 18 ® ECP5 Versa Development Board Figure 11. Voltage Regulators...
  • Page 19 ® ECP5 Versa Development Board Figure 12. Programming DONE INITN...
  • Page 20 ® ECP5 Versa Development Board Figure 13. SERDES...
  • Page 21 ® ECP5 Versa Development Board Figure 14. 10/100/1000-T PHY #1/RJ45...
  • Page 22 ® ECP5 Versa Development Board Figure 15. 10/100/1000-T PHY #2/RJ45...
  • Page 23 ® ECP5 Versa Development Board Figure 16. DDR3 Memory SWITCH[1..8]...
  • Page 24 ® ECP5 Versa Development Board Figure 17. LEDs and Switches SEG[0:14]...
  • Page 25 ® ECP5 Versa Development Board Figure 18. Reference Clock Generator...
  • Page 26 ® ECP5 Versa Development Board Figure 19. Expansion Connector...

  • Page 27: Appendix B. Bill Of Materials

    ® ECP5 Versa Development Board Appendix B. Bill of Materials Table 13. ECP5 Versa Development Board Bill of Materials Item Quantity Reference Part Manufacturer Part Number Description PCI Express x1 Edge  Finger Conn. C1,C2,C3,C4,C5,C20,C21, 10NF-0402SMT Panasonic ECJ0EB1E103K CAP .01UF 25V...
  • Page 28 ® ECP5 Versa Development Board Item Quantity Reference Part Manufacturer Part Number Description C182,C184,C187,C190, 10NF-0603SMT Kemet C0603C103K5RACTU CAP .01UF 50V C192,C194,C196,C198, CERAMIC X7R 0603 C200,C204,C217,C219, C221,C223,C226,C228, C234,C236,C241 C229 6.8UF-TAN-0805SMT Kemet T494R685K006AS CAP TANT 6.8UF 6.3V 10% SMD C235 560PF-0603SMT Kemet...
  • Page 29 ® ECP5 Versa Development Board Item Quantity Reference Part Manufacturer Part Number Description EXB2HV221JV Panasonic EXB2HV221JV RES ARRAY 220 OHM 5% 8 RES SMD EXB2HV472JV Panasonic EXB2HV472JV RES ARRAY 4.7K OHM 5% 8 RES SMD CTS-RT1402B7 CTS Corporation Resis- RT2402B7...
  • Page 30 ® ECP5 Versa Development Board Item Quantity Reference Part Manufacturer Part Number Description R63,R64,R66,R67,R70 Vishay Dale WSL2010R1000FEA RES .1 OHM 1/2W 1% 2010 SMD R71,R75 2_2K-0603SMT-DNI R73,R74,R107,R108,R156 100R-0402SMT Panasonic ERJ-2RKF1000X RES 100 OHM 1/10W 1% 0402 SMD 0R-0603SMT-DNI R85,R99,R111,R114 Vishay CRCW040220R0FKED RES 20.0 OHM 1/16W 1%...
  • Page 31 ® ECP5 Versa Development Board Item Quantity Reference Part Manufacturer Part Number Description LP2998-SO8 National LP2998MAX/NOPB Termination regulator ispCLOCK5406D LATTICE SUPPLIED ISPPAC-CLK5406D- 01SN48I U14,U15 88E1512_56QFN Marvell 88E1512-A0-NNP2C000 SINGLE-PORT EEE GIGABIT ETHER U44,U45 R0_1-3 Panasonic ERJ-3GEY0R00V RES 0.0 OHM 1/10W 0603 SMD...

  • Page 32: Appendix C. Demo Board Rev A Information

    Appendix C. Demo Board Rev A Information ECP5 Versa Development Board – Working with Revision A This document covers the Revision B of ECP5 Versa. To work with Revision A there are several items to be aware Setting the Configuration Mode On the Rev A, setting the Configuration Mode requires modifying the resistor population in the CFG[2:0] Setting Resistor Field (see Figure 3) as described in Table 3.

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