Expansion Header - National Semiconductor ADC081500DEV Instruction Manual

Single 8-bit, 1.5 gsps, 1.2w a/d converter with xilinx virtex 4 (xc4vlx15) fpga
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10.2 Expansion Header

A 72 pin Future Bus Expansion Header is provided on the rear panel to allow easy connection to a third
party microprocessor board to allow for the reading and analysis of the data captured by the FPGA.
The signals connector to this expansion bus will be as follows
PIN
DESCRIPTION
A1
I2C - SDA
A2
I2C - SCL
A3
SSP - SERIAL DATA
A4
SSP - SERIAL CLOCK
A5
FPGA RESET
A6
READ FIFO
A7
WRITE FIFO
A8
FIFO FULL
A9
FIFO EMPTY
A10
ADC DCLK RESET
A11
FPGA CONF DONE
A12
FPGA JTAG – TMS
A13
FPGA JTAG - TCK
A14
FPGA JTAG – TDI
A15
FPGA JTAG – TDO
A16
notSHUTDOWN
A17
3.3V SUPPLY
A18
12V SUPPLY
C1
DATA BUS A P0 (LVDS or CMOS)
C2
DATA BUS A P1 (LVDS or CMOS)
C3
DATA BUS A P2 (LVDS or CMOS)
C4
DATA BUS A P3 (LVDS or CMOS)
C5
DATA BUS A P4 (LVDS or CMOS)
C6
DATA BUS A P5 (LVDS or CMOS)
C7
DATA BUS A P6 (LVDS or CMOS)
C8
DATA BUS A P7 (LVDS or CMOS)
C9
INPUT STROBE P
C10
DATA BUS B P0 (LVDS or CMOS)
C11
DATA BUS B P1 (LVDS or CMOS)
C12
DATA BUS B P2 (LVDS or CMOS)
C13
DATA BUS B P3 (LVDS or CMOS)
C14
DATA BUS B P4 (LVDS or CMOS)
C15
DATA BUS B P5 (LVDS or CMOS)
C16
DATA BUS B P6 (LVDS or CMOS)
C17
DATA BUS B P7 (LVDS or CMOS)
C18
OUTPUT STROBE P
The Data busses on this header can be configured as follows
Two 8 bit busses with LVDS differential signaling, plus two LVDS strobes
Four 8 bit busses with LVCMOS (3.3V IO) signaling plus four CMOS strobes
All control signals on pins A1 to A15 will be at LVCMOS 3.3V levels.
PIN
DESCRIPTION
B1
GROUND
B2
GROUND
B3
GROUND
B4
GROUND
B5
GROUND
B6
GROUND
B7
GROUND
B8
GROUND
B9
GROUND
B10
GROUND
B11
GROUND
B12
GROUND
B13
GROUND
B14
GROUND
B15
GROUND
B16
GROUND
B17
GROUND
B18
GROUND
D1
DATA BUS A N0 (LVDS or CMOS)
D2
DATA BUS A N1 (LVDS or CMOS)
D3
DATA BUS A N2 (LVDS or CMOS)
D4
DATA BUS A N3 (LVDS or CMOS)
D5
DATA BUS A N4 (LVDS or CMOS)
D6
DATA BUS A N5 (LVDS or CMOS)
D7
DATA BUS A N6 (LVDS or CMOS)
D8
DATA BUS A N7 (LVDS or CMOS)
D9
INPUT STROBE N
D10
DATA BUS B N0 (LVDS or CMOS)
D11
DATA BUS B N1 (LVDS or CMOS)
D12
DATA BUS B N2 (LVDS or CMOS)
D13
DATA BUS B N3 (LVDS or CMOS)
D14
DATA BUS B N4 (LVDS or CMOS)
D15
DATA BUS B N5 (LVDS or CMOS)
D16
DATA BUS B N6 (LVDS or CMOS)
D17
DATA BUS B N7 (LVDS or CMOS)
D18
OUTPUT STROBE N
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