Table of Contents
Advertisement
E0C6001 TECHNICAL HARDWARE
Mask option
(segment allocation)
Address
D3
09AH
d
09BH
p
09CH
d '
09DH
p '
Display data memory allocation
Fig. 4.6.9
Segment allocation
I-42
(1) Segment allocation
As shown in Figure 4.l.1, the E0C6001 Series display
data is decided by the display data written to the display
memory (write-only) at address 090H–0AFH.
The address and bits of the display memory can be made
to correspond to the segment pins (SEG0–SEG19) in any
combination through mask option. This simplifies design
by increasing the degree of freedom with which the liquid
crystal panel can be designed.
Figure 4.6.9 shows an example of the relationship be-
tween the LCD segments (on the panel) and the display
memory in the case of 1/3 duty.
Data
D2
D1
D0
c
b
a
g
f
e
c '
b '
a '
g '
f '
e '
Common 0
SEG10
9 A , D 0
( a )
SEG11
9 A , D 1
( b )
SEG12
9 D , D 1
( f ' )
Pin address allocation
a
b
f
g
e
c
d
SEG10
SEG11
SEG12
Common 0
Common 1
Common 2
Common 1
Common 2
9 B , D 1
9 B , D 0
( f )
( e )
9 B , D 2
9 A , D 3
( g )
( d )
9 A , D 2
9 B , D 3
( c )
( p )
a'
b'
f'
g'
c'
e'
p'
p
d'
Advertisement
Chapters
Table of Contents
