About The Subject Of This User's Manual; Internal Connection; System In Package (Sip) - NEC V850ES/DJ2 User Manual

1.3 About the Subject of this User's Manual

This User's Manual is an extension of the F_Line User's Manual.
F_Line Items:
For all of the items regarding the FG2 please refer to the F_Line User's Manual/Data Sheet
(U17215EJ2V0UD00 (2nd edition) and further releases).
MTRC of D_Line:
In this User's Manual/Data Sheet all of the MTRC relevant items and the internal connection or pinout
of the D_Line device are regarded.

1.4 Internal Connection

The following pins of the FG2 device are connected to the MTRC:
• CSI I/F:
• Chip select:

1.4.1 System in Package (SiP)

1 chip
FG2 Device
CPU
CSI
18
Chapter 1 Introduction
SIB1, SOB1, SCKB1
PCM0 as CS
Figure 1-1: D_Line SiP
CLKOUT
PCM0
SCKB1
SIB1
SOB1
User's Manual U17763EE1V1UD00
MTRC
CLK
CSI
CS
SCK
RegCTL
SO
SM
Macro
SI