Sub System Clock Oscillation Circuit Characteristics - NEC V850ES/DJ2 User Manual

9.4.2 Sub System Clock Oscillation Circuit Characteristics

(V =EV =BV =MTV
DD DD DD
V =EV =BV =MTV
SS SS SS
T =-40 to +85°C)
A
Recommended cir-
Resonator
cuit
XT1
Crystal
resonator
XT1
RC
resonator
a) Time required from when V
crystal resonator stabilizes.
b) In order to avoid the influence of wiring capacity, shorten wiring as much as possible.
Cautions: 1. When using the subclock oscillator, wire as follows in the area enclosed by the
broken lines in the above figures to avoid an adverse effect from wiring capaci-
tance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating
current flows.
• Always make the ground point of the oscillator capacitor the same potential
as V
• Do not ground the capacitor to a ground pattern through which a high cur-
rent flows.
• Do not fetch signals from the oscillator.
1. The subclock oscillator is designed as a low-amplitude circuit for reducing cur-
rent consumption, and is more prone to malfunction due to noise than the main
clock oscillator. Particular care is therefore required with the wiring method when
the subclock is used.
134
Chapter 9 Electrical Specification
=SMV =AV =4.0 to 5.5 V,
DD DD REF0
=SMV =AV =0 V,
SS SS SS
Pyaarameter
Oscillation fre-
quency (f )
XT
XT2
Oscillation stabili-
a
zation time
Oscillation fre-
quency (f )
XT
XT2
Oscillation stabili-
a
zation time
reaches oscillation voltage range (MIN.= 4.0 V) to when the
DD
.
SS
Preliminary User's Manual U17763EE1V1UD00
Conditions
R = 390 kΩ ±5%
b
b
C = 47 pF ±10%
MIN. TYP. MAX.
32 32.768 35
10
25 40 55
100
Unit
KHz
s
KHz
s