Control Data 3100 Reference Manual page 7

TABLE
TABLES
1-1 Optional Memory Configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-3
1-2 Characteristics of 3100 Computer Registers ....................................... 1-10
1-3 Register File Assignments ...................................................... 1-13
2-1 Absolute Addresses ............................................................. 2-3
2-2 Auto Loadl Auto Dump Reserved Addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-4
2-3 Storage Protection Switch Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-5
2-4 Storage Protection Switch Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-5
4-1 Interrupt Mask Register Bit Assignments ......................................... 4-3
4-2 Interrupt Priority. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-4
4-3 Representative Interrupt Codes .................................................. 4-5
5-1 Keyboard Switch Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-9
5-2 Console Main-Frame Switches ................................................... 5-10
5-3 Power Control Panel Switch Functions ............... , .. " ........ , .............. 5-15
6-1 Console Typewriter Switches and Indicators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-4
6-2 Console Typewriter Codes ....................................................... 6-5
7 -1 List of Trapped Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-7
7-2 Instruction Synopsis and Index. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-8
7-3 Summary of Instruction Execution Times ......................................... 7-11
7-4 Interrupt Mask Register Bit Assignments ......................................... 7-61
7-4a Bit Assignments for Interrupt Sensing Conditions ................................. 7-61
7-5 Internal Status Sensing Mask ................................................... 7-62
7 -6 Block Control Clearing Mask .................................................... 7-63
7-7 Pause Sensing Mask .................................................. , ......... 7-64
7-8 Interrupt Mask Register Bit Assignments ......................................... 7-65
7 -9 Modified I/O Instruction Words .................................................. 7-69
8-1 Instruction Interpretations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-8
8-2 COMPASS Coding Form Description ............................................. 8-18
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