Control Data 3100 Reference Manual page 170

ARITHMETIC
ADDITION AND SUBTRACTION
Binary numbers are added according to the following rules:
0+0=0
0+1=1
1+0=1
1
+
1
=
0 with a carry of 1
The addition of two binary numbers proceeds as follows (the decimal equivalents verify
the result):
Augend 0111 (7)
Addend +0100 +(4)
Partial Sum 0011
Carry
_1_
Sum 1011
(11 )
Subtraction may be performed as an addition:
8 (minuend)
-6 (subtrahend)
2 (difference)
8 (minuend)
or
~
(1 O's complement of subtrahend)
2 (difference - omit carry)
The second method shows subtraction performed by the "adding the complement"
method. The omission of the carry in the illustration has the effect of reducing the result
by 10.
One's Complement
The computer performs all arithmetic and counting operations in the binary one's comple-
ment mode. In this system, positive numbers are represented by the binary equivalent
and negative numbers in one's complement notation.
The one's complement representation of a number is found by subtracting each bit of
the number from 1. For example:
1111
-1001 9
0110 (one's complement of 9)
This representation of a negative binary quantity may also be obtained by substituting
"l's" for "O's" and "O's" for "l's".
The value zero can be represented in one's complement notation in two ways:
0000--+002 Positive (+) Zero
1111 --+ 112 Negative (-) Zero
The rules regarding the use of these two form; for computation are:
• Both positive and negative zero are acceptable as arithmetic operands.
• If the result of an arithmetic operation is zero, it will be expressed as positive zero.
One's complement notation applies not only to arithmetic operations performed in A,
but also to the modification of execution addresses in the F register. During address
modification, the modified address will equal
777778
only if the unmodified execution
address equals
777778
and b
=
0 or (B
b
)
=
777778.
B-3