Aaeon EPIC-QM77 Manual page 138

Epic board. intel core i7/i5/i3/celeron processor supports ddr3/l 1333/1600 memory 18/24-bit single/dual channel lvds crt, dvi-i, hdmi 2 usb 3.0, 4 usb2.0, 6 coms, 2 sata 16-bit digital i/o co-lay with lpt
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E P I C B o a r d
************************************************************************************
SIOEnterMBPnPMode()
VOID   
 
IOWriteByte(SIOIndex, 0x87); 
 
IOWriteByte(SIOIndex, 0x87); 
 
SIOExitMBPnPMode()
VOID   
 
IOWriteByte(SIOIndex, 0xAA); 
 
SIOSelectLDN(byte LDN)
VOID   
IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 
 
IOWriteByte(SIOData, 
 
SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value)
VOID   
 
Byte TmpValue; 
 
 
SIOEnterMBPnPMode(); 
SIOSelectLDN(byte 
 
IOWriteByte(SIOIndex, Register); 
 
TmpValue = IOReadByte(SIOData); 
 
TmpValue &= ~(1 << BitNum); 
 
TmpValue |= (Value << BitNum); 
 
IOWriteByte(SIOData, TmpValue); 
 
SIOExitMBPnPMode(); 
 
SIOByteSet(byte LDN, byte Register, byte Value)
VOID   
 
SIOEnterMBPnPMode(); 
SIOSelectLDN(LDN); 
 
IOWriteByte(SIOIndex, Register); 
IOWriteByte(SIOData, 
SIOExitMBPnPMode(); 
************************************************************************************
Appendix D Electrical Specifications for I/O Ports
); 
LDN
); 
LDN
); 
Value
D-12
E P I C - Q M 7 7

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