Aaeon EPIC-QM77 Manual page 134

Epic board. intel core i7/i5/i3/celeron processor supports ddr3/l 1333/1600 memory 18/24-bit single/dual channel lvds crt, dvi-i, hdmi 2 usb 3.0, 4 usb2.0, 6 coms, 2 sata 16-bit digital i/o co-lay with lpt

page of 139

/ 139
Contents
Table of Contents
Bookmarks

Table of Contents

E P I C B o a r d

************************************************************************************

// Digital Input Status relative definition (Please reference to Table 2)

#define byte DInput11LDN // This parameter is represented from Note3‐1

#define byte DInput11Reg // This parameter is represented from Note4‐1

#define byte DInput11Bit // This parameter is represented from Note5‐1

#define byte DInput12LDN // This parameter is represented from Note6‐1

#define byte DInput12Reg // This parameter is represented from Note7‐1

#define byte DInput12Bit // This parameter is represented from Note8‐1

#define byte DInput13LDN // This parameter is represented from Note9‐1

#define byte DInput13Reg // This parameter is represented from Note10‐1

#define byte DInput13Bit // This parameter is represented from Note11‐1

#define byte DInput14LDN // This parameter is represented from Note12‐1

#define byte DInput14Reg // This parameter is represented from Note13‐1

#define byte DInput14Bit // This parameter is represented from Note14‐1

#define byte DInput15LDN // This parameter is represented from Note15‐1

#define byte DInput15Reg // This parameter is represented from Note16‐1

#define byte DInput15Bit // This parameter is represented from Note17‐1

#define byte DInput16LDN // This parameter is represented from Note18‐1

#define byte DInput16Reg // This parameter is represented from Note19‐1

#define byte DInput16Bit // This parameter is represented from Note20‐1

#define byte DInput17LDN // This parameter is represented from Note21‐1

#define byte DInput17Reg // This parameter is represented from Note22‐1

#define byte DInput17Bit // This parameter is represented from Note23‐1

#define byte DInput18LDN // This parameter is represented from Note24‐1

#define byte DInput18Reg // This parameter is represented from Note25‐1

#define byte DInput18Bit // This parameter is represented from Note26‐1

************************************************************************************

Appendix D Electrical Specifications for I/O Ports

E P I C - Q M 7 7

D-8

Table of Contents

Aaeon EPIC-QM77 Manual page 134

Related Manuals for Aaeon EPIC-QM77

Related Products for Aaeon EPIC-QM77

Table of Contents