LVDS Interface
LVDS Flat Panel Display Connector
The integrated LVDS flat panel display in the Blackbird is an ANSI/TIA/EIA-644-1995
specification-compliant interface. It can support 18 or 24 bits of RGB pixel data plus 3 bits of
timing control (HSYNC/VSYNC/DE) on the 4 differential data output pairs. The LVDS interface
supports a maximum resolution of 1920x1080 (60 Hz). The figure below shows the location of
the LVDS display connector as well as the location and pin orientation of the LVDS back light
connector.
The BIOS Setup utility provides several options for standard LVDS flat panel types. If these
options do not match the requirements of the panel you are using, contact
Support@VersaLogic.com
Figure 22. Location of the LVDS Connectors
Table 15: LVDS Flat Panel Display Connector Pinout
VL-EPU-4562/4462 Reference Manual
for a custom video BIOS.
Pin
Signal Name
1
GD1
2
LVDS_ODD0_N
3
LVDS_ODD0_P
4
LVDS_ODD1_N
5
LVDS_ODD1_P
6
LVDS_ODD2_N
7
LVDS_ODD2_P
8
GND1
9
LVDS_ODDCLK_N
10
LVDS_ODDCLK_P
11
LVDS_ODD3_N
12
LVDS_ODD3_P
13
LVDS_EVEN0_N
Function
Guard (tie to Earth Ground).
LVDS Odd Lane 0 Neg Diff Signal
LVDS Odd Lane 0 Pos Diff Signal
LVDS Odd Lane 1 Neg Diff Signal
LVDS Odd Lane 1 Pos Diff Signal
LVDS Odd Lane 2 Neg Diff Signal
LVDS Odd Lane 2 Pos Diff Signal
Signal/Power Ground
LVDS Odd Clock Neg Diff Signal
LVDS Odd Clock Pos Diff Signal
LVDS Odd Lane 3 Neg Diff Signal
LVDS Odd Lane 3 Pos Diff Signal
LVDS Even Lane 0 Neg Diff Signal
Video Interfaces
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