DEC 7000 AXP Operation Manual page 17

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The LSB bus is a synchronous 128-bit system bus that interconnects the
processors, memory modules, and the I/O port (IOP) module. The IOP
module connects the LSB bus to I/O buses through separate I/O adapter
modules.
The LSB bus uses the concept of a node. The LSB bus has three types of
nodes: processors, memories, and an I/O port controller.
A processor node is a single-module scalar processor. It consists of a
CPU chip, the LSB bus interface, cache, and support logic. DEC 7000 sys-
tems use the KN7AA processor, and VAX 7000 systems use the KA7AA
processor.
In a multiprocessing system, one processor becomes the boot processor dur-
ing power-up, and that boot processor loads the operating system and han-
dles communication with the operator console. The other processors be-
come secondary processors and receive system information from the boot
processor.
A memory node is one memory module. Memory is a global resource
equally accessible by all processors on the LSB. Memory modules can have
64, 128, 256, or 512 Mbytes of memory with ECC and associated control
logic. The memories are automatically interleaved when the system is con-
figured with multiple memory banks. The system supports up to seven
memory modules.
The I/O port controller is the IOP module, which serves as the interface
between the LSB bus and up to four I/O buses. In Figure 1-2 the DWLMA
module is the I/O bus adapter module that connects the XMI I/O channel
to the IOP module.
The XMI I/O channel also has I/O bus adapter modules that connect to
various interconnects such as CI, DSSI (for VAX 7000 systems only),
SDI/STI, SCSI (for DEC 7000 systems only), FDDI, and Ethernet.
DEC 7000 AXP System and VAX 7000 System 1-5

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