Table of Contents
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"1"
"0"
1 Bit
START
"1"
RxD
"0"
"1"
DTR
"0"
Rev.
Document No.: 19B00293
1.0
7 or 8
Bit
B0
B1
B2
B3
< Figure 2.1 Serial transmission bit frame >
buffer full
ready
< Figure 2.2 Line transmission with protocol >
OM5200 Technical Manual
None or
1 Bit
B4
B5
B6
B7
buffer emptied
busy
ready
busy
Date: March 6, 2018
1 or 2
Bit
STOP
PARITY
Page: 8
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