Varian Data 620/i System Reference Manual page 92

n
n+l
Condition
A(n)
Operand (n)
a
a
0
1
1 0
1 1
Indexing: No
Indirect Addressing: No
Registers Altered: A
¢RAI
Incl usive-OR Immediate
17 16 15 14 13 12 11 10 9 8 7 6
r-T-
I I
I
I
00 6
~-+-
I I
Operand
~.L
18-bi!..
option
Result
A(n)
a
1
1
a
Timing: 2 cycles
5 4 3 2 1 0
110
An inclusive-OR is performed between the contents of the
operand and the contents of the A register. The result is placed
in the A register. If either the operand or the A register con-
tains a one in the same bit position, a one is placed in the
result in the A register. The truth table is shown below, where
n
=
bit position:
Condition
A(n)
Operand (n)
0 0
0
1
1
0
1
1
Indexing: No
Indirect Addressing: No
Registers Altered: A
Result
A(n)
0
1
1
1
3-65