2. 1 COMPUTER
ORGANIZATION
SECTION 2
SYSTEM DESCRIPTION
The DATA 620/i is organized with a unique bus structure,
selection logic, and nine registers. The organization
provides universal information routing, buffered processing,
microprogramming capabiiity, indexing without time penalty,
and buffered input/output data transfer. A unique optional
facility, Micro-EXEC, is also available which permits
complex algorithms to be implemented with external control
hardware. This capability provides increases in processing
speed in excess of 400 percent over norma I programmed
operations.
The organization of the DA TA 620/i is shown in figure 2-1 •
This diagram shows the major functional elements of the
machine, including the registers and buses provided for
i nforma ti on transfer.
The major functional elements of the DATA 620/i, indicated
in figure 2-1, are: control section, arithmetic/logic
secti on, operationa I regi sters, i nterna I buses, i nput/ ou tput
(I/O)
bus, and memory.
2. 1 • 1 Control Secti on
The control. section provides the timing and control signals
required to perform all operations in the computer. The
major elements in this section are the U register, the timing
and decoding logic, and the shift control.
The U register (instruction register) is 16 bits long. This
register receives each instruction from memory through the
W bus and holds the instruction during its execution. The
con trol fi e Ids of th e i nstru cti on word are rou ted to the decod-
ing and timing logic where the codes determine the required
timing and control signals. The address field from the U
register, used for various addressing operations, is also routed
to the arithmetic/logic section.
The decoding logic decodes the fields of the instruction word
held in the U register to determine the control signal levels
required to perform the operations specified by the instruction.
These levels select the timing signals generated by the timing
unit.
2-1
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