If
X =
Address Mode
0-3
Immediate
4
Relative to P
5
Indexed with X
6
Indexed wi th
B
7
Direct or indirect
n
n+1
3-50
Extended-addressing instruction group (optional). The extended
address mode instructions are sim i lar in format to the immediate
instructions. However, the second word of the double-word
instruction contains the effective address. The address can be
indirect or direct. This is determined by bit 15 of the second
word.
00
6
YY
x
OP Code
Address Mode
Format
YY equals any single word instruction in the op code.
Effective Address
Second word contains operand
Contents of second word plus
(P
register plus 1)
Contents of second word plus X register
Contents of second word plus
B
register
Contents of second word is the direct address if bit 15 is
zero. Contents of second word is an indirect address if bit
15 is one.
LDAE
Load A Register Extended
Timing:
3
cycles
(optional)
17 16 15 14 13 12 11 10
9
8 7 6 5 4
3
2
0
r-T
I
I
I
I
I
00
3
01
X
~-+-
I
I
I
I
Operand Address
G-L-
18-bit
.-
optIon
The contents of the memory location as addressed by the operand
address at location n
+ 1
are placed in the A register.
Indexing: Yes
Indirect Addressing: Yes
Register Altered: A
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