Varian Data 620/i System Reference Manual page 43

3-16
The overflow indicator (OF) is set.
Indexing: No
Indirect Addressing: No
Registers Altered: OF
Reset Overflow Indi cator Timing: cycle
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[=I~:
00 7 400
lIS-bit
I
option
The overflow indicator (OF) is reset
Indexing: No
Indirect Addressing: No
Registers Altered: OF
Shift instruction group. For shift instructions 0-31
I
the address
fie Id , A, defines the type of shift (bits 5 -8)
and the number of
bit positions to be shifted (bits 0-4). The instruction format
showing the use of each A-field bit is given in table G-3 (a),
appendix G. Twelve of the possible sixteen shift operations
defined by bits 5-8 are implemented. These are summarized
in table G-3 (b). Figure 3-6 shows the general flow for the
shift instructions.
LSRA Logical Shift Right A Timing: 1 +0.25n
cycles
(n
=
number of
shifts)
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
r -
T -
!
00 4 340
+
n
L
_...L _
.a... _ _ _ _ _
---&. _ _ _
----IL---_ _ _ _ _
~
_ _ ___'
lIS-bit
I
option
The contents of the A register are shifted n places to the
right (n
=
0 to 37
8
), Zeros are shifted into the high-order
positions of the A register. Information shifted out of the
low-order posi tion of the A register is lost.