Digilent Arty Z7 Reference Manual page 8

There are many aspects of the Zynq APSoC architecture that are beyond the scope of this
document. For a complete and thorough description, refer to the
manual.
Table 2.1 depicts the external components connected to the MIO pins of the Arty Z7. The
Zynq Presets File found on the
Vivado Designs to properly configure the PS to work with these peripherals.
MIO 500 3.3 V Peripherals
Pin ENET 0
0 (N/C)
1
2
3
4
5
6
7 (N/C)
8
9 Ethernet Reset
10 Ethernet Interrupt
11
12
13 (N/C)
14
15
MIO 501
Peripherals
1.8V
ENET
Pin
0
16 TXCK
17 TXD0
18 TXD1
19 TXD2
20 TXD3
21 TXCTL
22 RXCK
23 RXD0
24 RXD1
25 RXD2
Arty Z7 Reference Manual
Arty Z7 Resource Center
SPI Flash
CS
DQ0
DQ1
DQ2
DQ3
SCLK
SLCK FB
SDIO
USB 0
0
Transfer Multisort Elektronik / tme.eu
Zynq Technical Reference
can be imported into EDK and
USB 0 Shield
USB Over
Current
Shield
Reset
UART 0
UART Input
UART
Output
8