Philips CEM2100/00 Service Manual page 402

[Digital servo processor section]
• Capable of decoding text data (CD-TEXT mode 4).
• Capable of performing sync pattern detection, sync signal protection and interpolation securely.
• Built-in EFM demodulation circuit and sub code demodulation circuit
• Has a jitter absorbing capacity be switched among ±6 frames and ±22 frames.
• Capable of making double C1 correction and quadruple C2 correction, using CIRC correction logical expressions.
• Built-in 64Kbit RAM
• Built-in digital attenuators
• Enables audio outputs to be switched among 32 fs, 48 fs, and 64 fs.
• Capable of reading sub code Q data at any time and outputting it in synchronization with audio data.
• Built-in data slice circuit (analog/digital slicing) and compensation circuit
• Built-in analog PLL (with an adjustment-free VCO)
• Uses an active wide-range PLL system.
• Supports variable-speed playback.
• Supports CLV modes (for up to ×2 speed)
• Supporting automatic loop gain, offset, and balance adjustments for focus and tracking servo sections.
• Built-in RF gain automatic adjustment circuit
• Built-in digital equalizer
• Built-in digital equalizer coefficient RAM, supporting various pickup types
• Built-in focus and tracking servo control circuits
• Supports all search control modes, thus realizing high-speed stable searches.
• Uses speed-controlled lens kick and feed kick.
• Built-in AFC and APC circuits for disc motor CLV servo control
• Built-in anti-defect and anti-shock circuits
• Support Stepper Motor
[Audio DSP section]
• Incorporating firmware for processing signals in various audio compression formats such as MP3, WMA, and
MPEG4-AAC.
• Incorporating 1 Mbit of SRAM (128 Kwords × 8 bits)
• Operation Clock : Built-in PLL for generating clock pulses for operation of the DSP block; any frequency can be
specified for clock pulses to be generated
• Operating speed
• DSP block having the following specifications:
Operation block: 24 bits × 24 bits + 51-bit multiplier, and 51-bit ALU
Data buss : 24 bits × 3
Data RAM : 12 Kwords
Coefficient ROM : 44 Kwords
Program RAM : 1 Kwords
Program ROM : 36 Kwords
• Audio Input port : 2 ( Supports 3line PCM and I2S, 32/48/64fs)
• Audio Output port : 1 (Support 3 line PCM and I2S, 32/48/64fs)
• SPDIF Output
[Audio DAC section]
• Supports externally input BCKi, LRCKi, Ai signals.
• Built-in 24-bit FIR digital filter for lower in-band ripple(less than +/- 0.025dB and high attenuation(less than -60dB)
on out of the band
• Built-in ×8 over-sampling digital filter
：87.5MIPS
2
TC94B14MFG
2010-01-12