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CEM2100/98
Philips CEM2100/98 Manuals
Manuals and User Guides for Philips CEM2100/98. We have
1
Philips CEM2100/98 manual available for free PDF download: Service Manual
Philips CEM2100/98 Service Manual (430 pages)
Mini System
Brand:
Philips
| Category:
Car Stereo System
| Size: 6.69 MB
Table of Contents
Board
5
Table of Contents
115
Features
123
Pin Assignment
125
Block Diagram
126
Pin Names and Functions
127
2 Operational Description
131
CPU Core Functions
131
Memory Address Map
131
Program Memory (Flash)
131
Data Memory (RAM)
131
System Clock Controller
132
Clock Generator
132
Timing Generator
134
Machine Cycle
135
Operation Mode Control Circuit
135
Single-Clock Mode
135
STOP Mode
137
Operating Mode Control
140
STOP Mode
140
IDLE1/2 Mode and SLEEP1/2 Mode
144
IDLE0 and SLEEP0 Modes (IDLE0, SLEEP0)
147
Reset Circuit
153
External Reset Input
153
Address Trap Reset
154
Watchdog Timer Reset
154
System Clock Reset
154
3 Interrupt Control Circuit
157
Interrupt Latches (IL23 to IL2)
157
Interrupt Enable Register (EIR)
158
Interrupt Master Enable Flag (IMF)
158
Individual Interrupt Enable Flags (EF23 to EF4)
159
Note 3
160
Interrupt Sequence
161
Interrupt Acceptance Processing Is Packaged as Follows
161
Saving/Restoring General-Purpose Registers
162
Using PUSH and POP Instructions
162
Using Data Transfer Instructions
162
Interrupt Return
163
Software Interrupt (INTSW)
164
Address Error Detection
164
Debugging
164
Undefined Instruction Interrupt (INTUNDEF)
164
Address Trap Interrupt (INTATRAP)
164
External Interrupts
165
4 Special Function Register (SFR)
167
Sfr
167
Dbr
169
5 I/O Ports
171
Port P0 (P07 to P00)
172
Port P1 (P17 to P10)
174
Port P2 (P22 to P20)
176
Port P3 (P37 to P30) (Large Current Port)
177
Port P4 (P47 to P40)
178
Port P5 (P54 to P50) (Large Current Port)
180
Port P6 (P67 to P60)
181
Port P7 (P77 to P70)
184
6 Watchdog Timer (WDT)
187
Watchdog Timer Configuration
187
Watchdog Timer Control
188
Malfunction Detection Methods Using the Watchdog Timer
188
Watchdog Timer Enable
189
Watchdog Timer Disable
190
Watchdog Timer Interrupt (INTWDT)
190
Watchdog Timer Reset
191
Address Trap
192
Selection of Address Trap in Internal RAM (ATAS)
192
Selection of Operation at Address Trap (ATOUT)
192
Address Trap Interrupt (INTATRAP)
192
Address Trap Reset
193
7 Time Base Timer (TBT)
195
Time Base Timer
195
Configuration
195
Control
195
Function
196
Divider Output (DVO)
197
Configuration
197
Control
197
8 Bit Timercounter 1 (TC1)
199
Configuration
199
Timercounter Control
200
Function
202
Timer Mode
202
External Trigger Timer Mode
204
Event Counter Mode
206
Window Mode
207
Pulse Width Measurement Mode
208
Programmable Pulse Generate (PPG) Output Mode
211
9 Bit Timer/Counter2 (TC2)
215
Configuration
215
Control
216
Function
217
Timer Mode
217
Event Counter Mode
219
Window Mode
219
10 Bit Timercounter (TC3, TC4)
221
Configuration
221
Timercounter Control
222
Function
227
8-Bit Timer Mode (TC3 and 4)
227
8-Bit Event Counter Mode (TC3, 4)
228
8-Bit Programmable Divider Output (PDO) Mode (TC3, 4)
228
8-Bit Pulse Width Modulation (PWM) Output Mode (TC3, 4)
231
16-Bit Timer Mode (TC3 and 4)
233
16-Bit Event Counter Mode (TC3 and 4)
234
16-Bit Pulse Width Modulation (PWM) Output Mode (TC3 and 4)
234
16-Bit Programmable Pulse Generate (PPG) Output Mode (TC3 and 4)
237
Warm-Up Counter Mode
239
Low-Frequency Warm-Up Counter Mode (NORMAL1 → NORMAL2 → SLOW2 → SLOW1)
239
High-Frequency Warm-Up Counter Mode (SLOW1 → SLOW2 → NORMAL2 → NORMAL1)
240
11 Bit Timercounter (TC5, TC6)
241
Configuration
241
Timercounter Control
242
Function
247
8-Bit Timer Mode (TC5 and 6)
247
8-Bit Event Counter Mode (TC5, 6)
248
8-Bit Programmable Divider Output (PDO) Mode (TC5, 6)
248
8-Bit Pulse Width Modulation (PWM) Output Mode (TC5, 6)
251
16-Bit Timer Mode (TC5 and 6)
253
16-Bit Event Counter Mode (TC5 and 6)
254
16-Bit Pulse Width Modulation (PWM) Output Mode (TC5 and 6)
254
16-Bit Programmable Pulse Generate (PPG) Output Mode (TC5 and 6)
257
Warm-Up Counter Mode
259
Low-Frequency Warm-Up Counter Mode
259
12 Asynchronous Serial Interface (UART1 )
261
Configuration
261
Control
262
Transfer Data Format
264
Transfer Rate
265
Data Sampling Method
265
STOP Bit Length
266
Parity
266
Transmit/Receive Operation
266
Data Transmit Operation
266
Data Receive Operation
266
Status Flag
267
Parity Error
267
Framing Error
267
Overrun Error
267
Receive Data Buffer Full
268
Transmit Data Buffer Empty
268
Transmit End Flag
269
13 Asynchronous Serial Interface (UART2 )
271
Configuration
271
Control
272
Transfer Data Format
274
Transfer Rate
275
Data Sampling Method
275
STOP Bit Length
276
Parity
276
Transmit/Receive Operation
276
Data Transmit Operation
276
Data Receive Operation
276
Status Flag
277
Parity Error
277
Framing Error
277
Overrun Error
277
Receive Data Buffer Full
278
Transmit Data Buffer Empty
278
Transmit End Flag
279
14 Synchronous Serial Interface (SIO1)
281
Configuration
281
Control
282
Function
284
Serial Clock
284
Clock Source
284
Shift Edge
285
Transfer Bit Direction
286
Transmit Mode
286
Transmit/Receive Mode
287
Receive Mode
287
Transfer Modes
287
Transmit Mode
287
Transmit/Receive Mode
293
15 Synchronous Serial Interface (SIO2)
299
Configuration
299
Control
300
Function
302
Serial Clock
302
Clock Source
302
Shift Edge
303
Transfer Bit Direction
304
Transmit Mode
304
Transmit/Receive Mode
305
Transfer Modes
305
Transmit Mode
305
Transmit/Receive Mode
311
16 Serial Bus Interface(I2C Bus) Ver.-D (SBI)
317
Configuration
317
Control
317
Software Reset
317
The Data Format in the I2C Bus Mode
318
I2C Bus Control
319
Acknowledgement Mode Specification
321
Non-Acknowledgment Mode (ACK = "0")
321
Number of Transfer Bits
322
Serial Clock
322
Clock Synchronization
322
Slave Address and Address Recognition Mode Specification
323
Master/Slave Selection
323
Transmitter/Receiver Selection
323
Start/Stop Condition Generation
324
Interrupt Service Request and Cancel
324
Setting of I2C Bus Mode
325
Arbitration Lost Detection Monitor
325
Slave Address Match Detection Monitor
326
GENERAL CALL Detection Monitor
326
Last Received Bit Monitor
326
Data Transfer of I2C Bus
327
Device Initialization
327
Start Condition and Slave Address Generation
327
1-Word Data Transfer
327
When the MST Is "1" (Master Mode)
328
When the MST Is "0" (Slave Mode)
329
Stop Condition Generation
330
Restart
331
17 Bit AD Converter (ADC)
333
Configuration
333
Register Configuration
334
Function
337
Software Start Mode
337
Repeat Mode
337
Register Setting
338
STOP/SLOW Modes During AD Conversion
339
Analog Input Voltage and AD Conversion Result
340
Precautions about AD Converter
341
Restrictions for AD Conversion Interrupt (INTADC) Usage
341
Analog Input Pin Voltage Range
341
Analog Input Shared Pins
341
Noise Countermeasure
341
18 Key-On Wakeup (KWU)
343
Configuration
343
Control
343
Function
343
19 Flash Memory
345
Flash Memory Control
346
Flash Memory Command Sequence Execution Control (FLSCR<FLSMD>)
346
Flash Memory Bank Select Control (FLSCR<BANKSEL>)
346
Command Sequence
347
Byte Program
347
Sector Erase (4-Kbyte Erase)
347
Chip Erase (All Erase)
348
Product ID Entry
348
Product ID Exit
348
Security Program
348
Toggle Bit (D6)
349
Access to the Flash Memory Area
350
Flash Memory Control in the Serial PROM Mode
350
How to Write to the Flash Memory by Executing the Control Program in the RAM Area (in the RAM Loader Mode Within the Serial PROM Mode)
350
How to Write to the Flash Memory by Executing a User Write Control Program in the RAM Area (in the MCU Mode)
352
20 Serial PROM Mode
355
Outline
355
Memory Mapping
355
Serial PROM Mode Setting
356
Serial PROM Mode Control Pins
356
Pin Function
356
Example Connection for On-Board Writing
357
Activating the Serial PROM Mode
358
Interface Specifications for UART
359
Operation Command
361
Operation Mode
361
Flash Memory Erasing Mode (Operating Command: F0H)
363
Flash Memory Writing Mode (Operation Command: 30H)
365
RAM Loader Mode (Operation Command: 60H)
368
Flash Memory SUM Output Mode (Operation Command: 90H)
370
Product ID Code Output Mode (Operation Command: C0H)
371
Flash Memory Status Output Mode (Operation Command: C3H)
373
Flash Memory Security Program Setting Mode (Operation Command: FAH)
374
Error Code
376
Checksum (SUM)
376
Calculation Method
376
Calculation Data
377
Intel Hex Format (Binary)
378
Passwords
378
Password String
379
Handling of Password Error
379
Password Management During Program Development
379
Product ID Code
380
Flash Memory Status Code
380
Specifying the Erasure Area
382
Flowchart
383
UART Timing
384
21 Input/Output Circuit
385
Control Pins
385
Input/Output Ports
386
22 Electrical Characteristics
389
Absolute Maximum Ratings
389
Operating Conditions
390
MCU Mode (Flash Programming or Erasing)
390
MCU Mode (Except Flash Programming or Erasing)
390
Serial PROM Mode
391
DC Characteristics
392
AD Characteristics
394
AC Characteristics
395
Flash Characteristics
395
Write/Retention Characteristics
395
Recommended Oscillating Conditions
396
Handling Precaution
396
23 Package Dimensions
397
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