Advantech ARK-3202V -S6A1E User Manual page 43

This item enables users to set the timing delay in clock cycles before SDRAM
starts a read command after receiving it.
DRAM RAS# to CAS# Delay [Auto]
This item enables users to set the timing of the transition from RAS (row
address strobe) to CAS (column address strobe) as both rows and column are
separately addressed shortly after DRAM is refreshed.
DRAM RAS# Precharge [Auto]
This item enables users to set the DRAM RAS# precharge timing, system
default is setting to "Auto" to reference the data from SPD ROM.
Precharge Delay (tRAS) [Auto]
This item allows user to adjust memory precharge time.
Video BIOS Cacheable [Disabled]
This item allows the video BIOS to be cached to allow faster execution and bet-
ter performance.
On-Chip Frame Buffer Size [8 MB]
This item allows the user to adjust the on-chip frame buffer size 8 MB or 1 MB.
DVMT Mode [DVMT]
This item allows the user to adjust Intel's Dynamic Video Memory Technology
(DVMT). BIOS provides three options: DVMT, FIXED, and Both.
DVMT/FIXED Memory Size [128MB]
This item allows the user to adjust DVMT/FIXED graphics memory size.
Boot Display
This item allows the user to decide boot display mode.
Panel Number
This item allows the user to decide display resolution.
Init Display First
This item is the setting for start up video output: either from PCI Express or
Onboard device.
35 ARK-3202V User Manual