Ip429_Chxx_Ts - Dynamic Engineering IP-429-II User Manual

IP429_CHXX_TS

The Time Stamp registers are now accessed in the IO space. Be sure to use the
correct offset. There are eight (8) registers each used to store one 32 bit Time Tag.
The receiver number is the number assigned to each receiver on the board. Please
refer to the chart below. The U/L number indicates which part of the Time Tag/Stamp is
available at that address. The Time Stamp is a 32 bit number and the port size
available is 16 bits. It takes two reads and 1 shift to get the full 32 bit value. The
registers are organized to allow auto-incremented addresses. For example with a
PCI3IP you can do a 32 bit read from the L address to read both the L and U as a
packed 32 bit word.
The base counter is 32 bits wide and "counts up" at a rate of 1 MHz. When the Receive
interrupt for a particular channel is detected, the current count is stored into the Time
Tag register for that channel. The interrupt event used is electronically prior to the mask
and operates even if the interrupt for a particular channel is masked off. The Time Tag
can be used in polled mode.
Channel
channel 1
channel 2
channel 3
channel 4
IP429II_TS_DEV1_(CH1,CH2)_(UPR,LWR) - The Device differentiates between the
installed devices per the dash number. The CH1 or CH2 selects which receiver is
being referenced. The UPR or LWR selects the part of the Time Stamp being retrieved.
Use of 32 bit accesses for the Time Stamp, Load and Read functions is recommended.
Receivers
CH1,CH2
CH1,CH2
CH1,CH2
CH1,CH2
Embedded Solutions
3282 definition
1,2
1,2
1,2
1,2
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