Sign In
Upload
Manuals
Brands
Dynamic Engineering Manuals
Control Unit
PCIeBiSerialDb37-BA22
Dynamic Engineering PCIeBiSerialDb37-BA22 Manuals
Manuals and User Guides for Dynamic Engineering PCIeBiSerialDb37-BA22. We have
1
Dynamic Engineering PCIeBiSerialDb37-BA22 manual available for free PDF download: User Manual
Dynamic Engineering PCIeBiSerialDb37-BA22 User Manual (44 pages)
Image Data Transmit & Receive Port 2 bit serial with clock and sync PCIe 4 lane Module LVDS
Brand:
Dynamic Engineering
| Category:
Control Unit
| Size: 2 MB
Table of Contents
Table of Contents
3
Product Description
6
Figure 1 Pciebiserialdb37Ba22 Block Diagram
8
Figure 2 Pciebiserialdb37Ba22 Timing Diagram
11
Figure 3 Pciebiserialdb37Ba22 Image Diagram
12
Address Map
14
Base Address Map
14
Figure 4 Pciebiserialdb37Ba22 Internal Address Map Base Functions
14
Channel Address Map
15
Figure 5 Pciebiserialdb37Ba22 Channel Address Map
15
Programming
16
Base Register Definitions
18
Base Register Definitions BA22_BASE_BASE
18
Figure 6 Pciebiserialdb37Ba22 Control Base Register Bit Map
18
Ba22_Base_Id
19
Figure 7 Pciebiserialdb37Ba22 ID and Switch Bit Map
19
Ba22_Base_Status
20
Figure 8 Pciebiserialdb37Ba22 Status Port Bit Map
20
Ba22_Base_Pll_Write Ba22_Base_Pll_Read
21
Figure 9 Pciebiserialdb37Ba22 Pll Fifo Port Bit Map
21
Channel Bit Maps
22
Ba22_Chan_Cntrl
22
Figure 10 Pciebiserialdb37Ba22 Channel Control Register
22
Ba22_Chan_Status
25
Figure 11 Pciebiserialdb37Ba22 Channel Status Port
25
Ba22_Chan_Wr_Dma_Pntr
29
Figure 12 Pciebiserialdb37Ba22 Write Dma Pointer Register
29
Ba22_Chan_Tx_Fifo_Count
30
Ba22_Chan_Rd_Dma_Pntr
30
Figure 13 Pciebiserialdb37Ba22 Tx Fifo Data Count Port
30
Figure 14 Pciebiserialdb37Ba22 Read Dma Pointer Register
30
Ba22_Chan_Rx_Fifo_Count
31
Ba22_Chan_Fifo
31
Figure 15 Pciebiserialdb37Ba22 Rx Fifo Data Count Port
31
Figure 16 Pciebiserialdb37Ba22 Rx/Tx Fifo Port
31
Ba22_Chan_Tx_Amt_Lvl
32
Ba22_Chan_Rx_Afl_Lvl
32
Figure 17 Pciebiserialdb37Ba22 Tx Almost Empty Level Register
32
Figure 18 Pciebiserialdb37Ba22 Rx Almost Full Level Register
32
Ba22_Chan_Ready_Cnt
33
Ba22_Chan_Frame_Ref
33
Figure 19 Pciebiserialdb37Ba22 Tx Ready Count Register
33
Figure 20 Pciebiserialdb37Ba22 Tx Frame Reference Register
33
Ba22_Chan_Line_Length
34
Ba22_Chan_Idle_Length
34
Figure 21 Pciebiserialdb37Ba22 Tx Line Length Register
34
Figure 22 Pciebiserialdb37Ba22 Tx Idle Length Register
34
Ba22_Chan_Frame_Length
35
Chan_Tx_Preamblepat
35
Chan_Tx_Preamblelen
35
Figure 23 Pciebiserialdb37Ba22 Tx Frame Length Register
35
Figure 24 Pciebiserialdb37Ba22 Tx Preamble Pattern Register
35
Figure 25 Pciebiserialdb37Ba22 Tx Preamble Length Register
35
Chan_Tx_Syncpat
36
Chan_Tx_Synclen
36
Chan_Tx_Idlepat
36
Figure 26 Pciebiserialdb37Ba22 Tx Sync Pattern Register
36
Figure 27 Pciebiserialdb37Ba22 Tx Sync Length Register
36
Figure 28 Pciebiserialdb37Ba22 Tx Idle Pattern Register
36
Chan_Tx_Datapat
37
Figure 29 Pciebiserialdb37Ba22 Tx Data Pattern Register
37
Loop-Back
38
Figure 24 Pciebiserialdb37Ba22 Loop-Back Wiring Diagram
38
Pcie Module Front Panel Io Interface Pin Assignment
39
Figure 25 Pciebiserialdb37Ba22 Front Panel Interface
39
Applications Guide
40
Interfacing
40
Construction and Reliability
41
Thermal Considerations
41
Warranty and Repair
42
Service Policy
42
Out of Warranty Repairs
42
Specifications
43
Advertisement
Advertisement
Related Products
Dynamic Engineering PMC-UNIV-TEST
Dynamic Engineering PMC-UNIV-TEST-ENG
Dynamic Engineering PMC-BiSerial-III SDLC
Dynamic Engineering PCIeBiSerialDb37-LM9
Dynamic Engineering PCIe3IP
Dynamic Engineering PCIe5IP
Dynamic Engineering PCIe8LXMCX2CB
Dynamic Engineering PCIe8LSwVPX3U
Dynamic Engineering PCIe8LXMCX2
Dynamic Engineering PCIe-SpaceWire-Monitor
Dynamic Engineering Categories
PCI Card
Control Unit
Recording Equipment
Computer Hardware
Adapter
More Dynamic Engineering Manuals
Login
Sign In
OR
Sign in with Facebook
Sign in with Google
Upload manual
Upload from disk
Upload from URL