Ip429Ii_Parallel; Figure 8 Ip-429 Control Register 0 Bit Map - Dynamic Engineering IP-429-II User Manual

IP429II_Parallel

$0E 429 Control Register Port read/write
DATA BIT
15-8
FIGURE 8
The PIO port consists of read only and read-writeable bits. The lower 4 bits [0-3] are
read-writeable. The bits are used to control open drain high sink drivers. The read-
back comes from the bus side of the drivers. If high then a low on the driver indicates
another device is driving the line low. The lines are pulled up with 1K pull-up resistors
and are terminated with 33Ω series resistors. The upper 4 bits are read only and are
terminated with 33Ω series terminators.
The port is configured with an 8 bit register. The lower 4 bits are used to control the
open drain drivers as described above. The lower 8 bits of the port are the read-back
from the cable side of the interface. The upper 8 bits are the registered bits read-back –
not affected by the cable.
CONTROL REGISTER Parallel Port
7
6
5
4
3
2
1
0
Embedded Solutions
DESCRIPTION
read-back of lower 7 bits
PI_7 – read-back "cable side"
PI_6
PI_5
PI_4
PIO_3
PIO_2
PIO_1
PIO_0
IP-429 CONTROL REGISTER 0 BIT MAP
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