Ip Module Io Interface Pin Assignment; Figure 12 Ip-429 Io Interface - Dynamic Engineering IP-429-II User Manual

IP Module IO Interface Pin Assignment

The figure below gives the pin assignments for the IP Module IO Interface on the IP-
429. Also see the User Manual for your carrier board for more information.
Dev1Ch1_RXA
Dev1Ch1_RXB
GND
Dev1Ch2_RXA
Dev1CH2_RXB
GND
Dev1_TXA
Dev1_TXB
GND
Dev2Ch1_RXA
Dev2Ch1_RXB
GND
Dev2Ch2_RXA
Dev2Ch2_RXB
GND
Dev2_TXA
Dev2_TXB
GND
Dev3Ch1_RXA
Dev3Ch1_RXB
GND
Dev3Ch2_RXA
Dev3Ch2_RXB
GND
GND
NOTE 1: The layout of the pin numbers in this table corresponds to the physical placement of pins on the IP
connector. Thus this table may be used to easily locate the physical pin corresponding to a desired signal. Pin 1 is
marked with a square pad on the IP Module.
FIGURE 12
Please note: the IO assignments reference all of the possible TX and RX channels.
Your board may not have all of the IO installed depending on what was purchased.
Dev1CH1 and Dev1CH2 are part of channel 1, which is installed in all configurations.
Dev2CH1 and Dev2CH2 are part of channel 2, which is installed, in -2, -3, -4 models.
Dev3CH1 and Dev3CH2 are part of channel 3, which is installed, in -3, -4 models.
Dev4CH1 and Dev4CH2 are part of channel 4, which is only installed, in the -4 model.
Dev1, 2, 3, 4 TX refer to the transmitters that can be installed. Each channel has one
transmitter.
Dev3_TXA
Dev3_TXB
GND
Dev4Ch1_RXA
Dev4Ch1_RXB
GND
Dev4Ch2_RXA
Dev4Ch2_RXB
GND
Dev4_TXA
Dev4_TXB
TDI
TMS
TCK
TDO
PIO_0
PIO_1
PIO_2
PIO_3
PI_4
PI_5
PI_6
PI_7
Fused 3.3V
GND
Embedded Solutions
1 26
2 27
3 28
4 29
5 30
6 31
7 32
8 33
9 34
10 35
11 36
12 37
13 38
14 39
15 40
16 41
17 42
18 43
19 44
20 45
21 46
22 47
23 48
24 49
25 50
IP-429 IO INTERFACE
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