Ip429Ii_Base_Reg1; Figure 3 Ip-429 Control Register 1 Bit Map - Dynamic Engineering IP-429-II User Manual

IP429II_BASE_REG1

$02 429 Control Register Port read/write
DATA BIT
FIGURE 3
/DBCENx is used to force Parity to be inserted into the data stream. This bit is normally
left programmed to 0. There is another control bit within the -3282 that also controls
Parity along with even or odd sense. It is recommended to use the 3282 control bit.
Default is 0.
/RESETx is used to reset the 3282 associated with each channel. The channel should
be reset when the 3282 control register is written to. [write only port]. Default is reset
[0]. 1 = normal operation. Reset should be asserted for 200 nS minimum.
The TX FIFO, bit counters, word counter, gap timers, /DRx, and TXR are affected by
reset assertion. The Control register is not.
CONTROL REGISTER 1
7
6
5
4
3
2
1
0
Embedded Solutions
DESCRIPTION
/RESET4 reset, 1 = enabled
/RESET3
/RESET2
/RESET1
/DBCEN4 1 = force parity, 0 = normal
/DBCEN3
/DBCEN2
/DBCEN1
IP-429 CONTROL REGISTER 1 BIT MAP
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