Lattice Semiconductor MachXO2 User Manual page 7

Table 1 describes the components on the board and the interfaces it supports.
Table 1. Breakout Board Components and Interfaces
Component/Interface
Circuits
USB Controller
USB Mini-B Socket
Components
LCMXO2
Interfaces
LED Array
Four 2x20 Header
Landings
1x8 Header Landing
4x15 60-Hole Prototype
Area
Test Points
Subsystems
This section describes the principle sub systems for the Breakout Board in alphabetical order.
Clock Sources
All clocks for the counter demonstration designs originate from the MachXO2 on-chip oscillator. You may use an
expansion header landing to drive a FPGA input with an external clock source.
Expansion Header Landings
The expansion header landings provide access to user GPIOs, primary inputs, clocks, and VCCO pins of the
MachXO2. The remaining pins serve as power supplies for external connections. Each landing is configured as
one 2x20 100 mil.
Table 2. Expansion Connector Reference
Schematic
Type Reference
Circuit U2: FT2232H
I/O J7:USB_MINI_B
U3: LCMXO2-
FPGA
7000HE-4TG144C
Output D8-D1
J2: header_2x20
J3: header_2x20
I/O
J4: header_2x20
J5: header_2x20
I/O J1: header_1x8
TP1: +3.3V
Power TP2: +1.2V
TP3: GND
Item
Reference Designators
Part Number
USB-to-JTAG interface and dual USB UART/FIFO IC
Programming and debug interface
7000-LUT device packaged in a 20 x 20mm, 144-pin TQFP
Red LEDs
User-definable I/O
Optional JTAG interface
Prototype area 100mil centered holes.
Power and ground reference points
Description
J2, J3, J4, J5
header_2x20
7
MachXO2 Breakout Board
Evaluation Kit User's Guide
Description