4mm X 5 mm Power QFN package. performance and the current limit is thermally compensated. Key features offered by the IR3899 include internal Digital Soft Start/Soft Stop, precision This user guide contains the schematic and bill 0.5Vreference voltage,...
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VOUT+ and VOUT-. The inputs and output connections of the board are listed in Table I. IR3899 has only one input supply and internal LDO generates Vcc from Vin. If operation with external Vcc is required, then R15 can be removed and external Vcc can be applied between Vcc+ and Vcc- pins. Vin pin and Vcc/LDOout pins should be shorted together for external Vcc operation.
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IRDC3899-P1V2 TYPICAL OPERATING WAVEFORMS Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, no airflow Fig. 8: Start up at 9A Load, Fig. 7: Start up at 9A Load , Ch , Ch , Ch :Vcc , Ch , Ch :Enable good Good Fig. 10: Output Voltage Ripple, 9A load Fig.
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IRDC3899-P1V2 TYPICAL OPERATING WAVEFORMS Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, no air flow Fig. 13: Transient Response, 0A to 3A step Ch4-Iout 9/18/2012...
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IRDC3899-P1V2 TYPICAL OPERATING WAVEFORMS Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, no air flow Fig. 14: Bode Plot at 9A load shows a bandwidth of 78.13KHz and phase margin of 55.5 degrees 9/18/2012...
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IRDC3899-P1V2 TYPICAL OPERATING WAVEFORMS Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, no air flow Io [A] Fig.15: Efficiency versus load current Io [A] Fig.16: Power loss versus load current 9/18/2012...
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IRDC3899-P1V2 THERMAL IMAGES Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, No Air flow Fig. 17: Thermal Image of the board at 9A load Test point 1 is IR3899 Test point 2 is inductor 9/18/2012...
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IRDC3899-P1V2 PCB METAL AND COMPONENT PLACEMENT Evaluations have shown that the best overall performance is achieved using the substrate/PCB layout as shown in following figures. PQFN devices should be placed to an accuracy of 0.050mm on both X and Y axes. Self-centering behavior is highly dependent on solders and processes, and experiments should be run to confirm the limits of self-centering on specific processes.
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IRDC3899-P1V2 SOLDER RESIST IR recommends that the larger Power or Land Area pads are Solder Mask Defined (SMD.) This allows the underlying Copper traces to be as large as possible, which helps in terms of current carrying capability and device cooling capability. When using SMD pads, the underlying copper traces should be at least 0.05mm larger (on each edge) than the Solder Mask window, in order to accommodate any layer to layer misalignment.
IRDC3899-P1V2 STENCIL DESIGN Stencils for PQFN can be used with thicknesses of 0.100-0.250mm (0.004-0.010"). Stencils thinner than 0.100mm are unsuitable because they deposit insufficient solder paste to make good solder joints with the ground pad; high reductions sometimes create similar problems. Stencils in the range of 0.125mm-0.200mm (0.005-0.008"), with suitable reductions, give the best results.
IRDC3899-P1V2 PACKAGE INFORMATION Figure 21: Package Dimensions IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 This product has been designed and qualified for the Industrial market Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice.06/11 9/18/2012...
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