Advantech MIO-5272 User Manual page 48

6th gen intel core u-series i7/i5/i3/celeron, 3.5" mi/o-compact sbc, ddr3l, vga, hdmi, 48-bit lvds, 2 gbe, 2 mini pcie, msata, fanless, mioe

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3.2.2.7

PCI Express Configuration

PCI Express Clock Gating

Enable or disable PCI Express Clock Gating for each root port.

DMI Link ASPM Control

Enable/Disable the control of Active State Power Management on SA side of the DMI

Link.

Peer Memory Write Enable

Peer Memory Write Enable/Disable.

PCI Express Root Port 1/2/5/9

PCI Express Port 1/2/5/9 Settings.

MIO-5272 User Manual

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