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Technical Description
Process images (PII, PIQ)
The signal states of input and output modules are stored in the CPU in "process images". Process
images are reserved areas in the RAM of the CPU. Input and output modules have separate images
as follows:
•
Process image of the inputs (PII)
•
Process image of the outputs (PIQ)
Serial interface
You can connect programmers and also the SINEC L1 local area network.
Flags, timers, and counters
The CPU provides internal flags (memory locations for storing signal states), timers, and counters
that the control program can call.
The following are available
• 2048 flags*
• 128 timers
• 128 counters
Accumulator (ACCUM)
The accumulator is an arithmetic register for loading internal timer and counter values.
Comparison, arithmetic, and conversion operations are also executed in the accumulator.
Processor
The processor calls statements in the program memory in sequence and executes them according
to the control program. It processes the information from the PII and takes into consideration the
values of internal timers and counters as well as signal states of internal flags.
Input/output bus
The input/output bus establishes the electrical connection for all signals that are exchanged
between the CPU and the other modules in a central controller or an expansion unit.
Parallel interface
The parallel interface is the electrical connection between both subunits for synchronization and
data exchange.
*
FW 0 is reserved for the logical program counter.
FW 2 to FWS 198 (F 2.0 to F 199.7) are permitted for the control program.
FW 200 to FW 254 (F 200.0 to F 255.7) can only be used if you are not using standard FBs.
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S5-115F Manual
EWA 4NEB 811 6148-02
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