Cpld; Cpld Verilog Code - Fujitsu FR60 FAMILY User Manual

5 CPLD

The CPLD Xilinx XC9536XL-5VQL44C controls the direction of the data bus.

5.1 CPLD Verilog Code

`timescale 1ns / 1ps
///////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date:
// Design Name:
// Module Name:
// Project Name:
// Target Devices: XC9536XL-5VQ44
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision
// Additional Comments:
//
// USERCODE: 7S18
// ||||____ Subversion
// |||_____ Version
// ||______ Target 467S
//
//
///////////////////////////////////////////////////////////////////////////
module EMA_MB91F467S_LS_176M07_V11_cpld_7S18(
ECSx,
CSx,
WRx,
RDx,
ASx,
BAAx,
WEx,
IORDx,
IOWRx,
S401,
DIR_U400,
DIR_U401,
DIR_U404,
DIR_U405,
OEx_U404,
OEx_U405);
FMEMCU-UG-910070-17
EMA-MB91F467S-LS-176M07
Chapter 5: CPLD
Accemic GmbH & Co. KG
RH / AW
05/12/2007
EMA-MB91F467S-LS-176M07
F467S
ISE 9.2
1.8
none
**
// P09_7..P09_0
// P08_3..P08_0
// P08_4
// P10_1
// P10_2
// P10_3
// P11_0
// P11_1
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