Fujitsu FR60 FAMILY User Manual page 21

input ECSx;
input[7:0] CSx;
input[3:0] WRx;
input RDx;
input ASx;
input BAAx;
input WEx;
input IORDx;
input IOWRx;
input[7:1] S401;
output DIR_U400;
output DIR_U401;
output DIR_U404;
output DIR_U405;
output OEx_U404;
output OEx_U405;
reg OEx_U404, OEx_U405;
reg DIR_U400, DIR_U401, DIR_U404, DIR_U405;
always @*
begin
case (S401[3:1])
3'b111:
3'b110:
3'b101:
3'b100:
default:
endcase
OEx_U405 = OEx_U404;
// check schematic for DIR level (different on LS boards)
DIR_U400 = 1;
DIR_U401 = 1;
DIR_U404 = !RDx;
DIR_U405 = !RDx;
end
endmodule
© Fujitsu Microelectronics Europe GmbH
EMA-MB91F467S-LS-176M07
Chapter 5: CPLD
// CS_MASK
// CS0
OEx_U404 = !ECSx | (CSx[1] & CSx[2] & CSx[3]);
// CS1
OEx_U404 = !ECSx | (CSx[0] & CSx[2] & CSx[3]);
// CS2
OEx_U404 = !ECSx | (CSx[0] & CSx[1] & CSx[3]);
// CS3
OEx_U404 = !ECSx | (CSx[0] & CSx[1] & CSx[2]);
// none masked
OEx_U404 = !ECSx | (CSx[0] & CSx[1] & CSx[2] & CSx[3]);
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FMEMCU-UG-910070-17