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Related Manuals for ADLINK Technology ACL-7130
Summary of Contents for ADLINK Technology ACL-7130
- Page 1 ACL-7130 32 Channels Isolated Digital I/O Card...
- Page 2 Trademarks ACL-7130 is registered trademarks of ADLink Technology Inc., Advantech and PCL-730 is a trademark of Advantech Co., Ltd. IBM PC is a registered trademark of International Business Machines Corporation. Intel is a registered trademark of Intel Corporation.
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Page 3: Table Of Contents
IRQ S (JP4) ......14 ETTING OF OWER IGNAL OLARITY ................14 IGNAL ONNECTION 2.10 (JP5) ..........17 OUNTER IGNALS ONNECTOR 2.11 ACL-7130 S .........18 OFTWARE IBRARY NSTALLATION REGISTER STRUCTURE & PROGRAMMING.........19 I/O R ..............19 EGISTERS ORMAT ..............20 IGITAL NPUT EGISTER ..............20 IGITAL... - Page 4 APPENDIX B. DIGITAL I/O SIGNAL CONNECTION......34 ..........34 SOLATED IGITAL NPUT HANNELS ..........34 SOLATED IGITAL UTPUT HANNELS I/O C ..............35 IGITAL HANNELS PRODUCT WARRANTY/SERVICE .............37 ii • Introduction...
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Page 5: How To Use This Manual
How to Use This Manual This manual is designed to help you use the ACL-7130. The manual describes how to modify various settings on the ACL- 7130 card to meet your requirements. It is divided into five chapters: • Chapter 1, "Introduction," gives an overview of the product features, applications, and specifications. -
Page 7: Introduction
Introduction The ACL-7130 is an isolated digital I/O card. It is a compact-size add-on card for IBM AT compatible PC. The card provides 16 isolated input and 16 isolated output channels. The isolated channels are suitable for applications in the industry environment. -
Page 8: Features
Features The ACL-7130 Isolated D/I Card provides the following advanced features: • 16 isolated digital input and output channels • 16 non-isolated digital input and output channels • One 8254 chip on board which provide a set of cascaded timers and one independent counter •... -
Page 9: Specifications
Specifications ♦ General Specification • Dimensions : 193 mm x 103 mm • Bus : PC-AT bus • Slot : One 36 pin slot and one 62-pin slot • I/O port address : Hex 200 ~ Hex 3F8 (8 bytes) •... - Page 10 • Isolation Voltage : 2,500 VDC • Max. Throughput : 10KHz ♦ Non-isolated Digital Input • Input logic low voltage : Min. -0.5V; Max. 0.8V • Input logic high voltage : Min. 2.0V; Max. 5.0V • Input loading current : Max. 0.2 mA at 0.4V •...
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Page 11: Installation
Installation This chapter describes the configurations and multi-functions of the ACL-7130 and teach users to install the ACL-7130. At first, the contents in the package and unpacking information that you should care about are described. The versatile configurations of ACL-7130 are introduced so that you can configure it according to your applications. -
Page 12: Unpacking
IC's to make sure that they are properly seated. Do this only with the module place on a firm flat surface. Note : DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN DAMAGED. You are now ready to install your ACL-7130. 6 • Installation... -
Page 13: Acl-7130'S Layout
ACL-7130's Layout Figure 2.1 PCB Layout Note: CN4 is for Rev A only JP6 is for Rev B only Installation • 7... -
Page 14: Jumper And Dip Switch Description
PC. Please check your PC before installing the ACL-7130. The ACL-7130's base address of registers is selected by an 6 position DIP switch SW1. The default setting of base address is set to be HEX 300. All possible base address combinations are listed as Table 2.2. - Page 15 BASE_ADDR. = Hex 300 A ( 8 Figure 2.2 Default Base Address Setting I/O port Address(Hex) 200-207 208-20F 210-217 218-21F 2F8-2FF 300-307 (default) 308-30F 3F0-3F7 3F8-3FF * A3, ..., A8 is corresponding to PC Bus address lines Table 2.1 Possible Base Address Combinations Installation •...
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Page 16: Interrupt Setting
How to Define a Base Address for the ACL-7130 ? The DIP1 to DIP6 in the switch SW1 are one to one corresponding to the PC bus address line A9 to A4. A0, A1, and A2 are always 0 and A9 is always 1. If you want to change the base address, you can only change the values of A8 to A3 (shadow area of below table). - Page 17 Note : Both lower and higher IRQ can be set simultaneously. And, two different IRQ can be generated by using ACL-7130. Be aware that there is no other add-on card shares the same interrupt level at the same system.
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Page 18: Setting Of Irq Signal Source
Setting of IRQ Signal Source The lower Interrupt IRQ source (JP3) can be set as either IDI_0 : Isolated Digital Input channel 0, or IDI_1 : Isolated Digital Input channel 1, or DI_0 : Digital Input 0, or DI_1 : Digital Input 1. The jumper JP4 is used for signal source selection. -
Page 19: Setting Of Lower Irq Signal Polarity (Jp4)
Setting of Lower IRQ Signal Polarity (JP4) The Interrupt signal can be selected as Fall Edge trigger or Rise Edge trigger. It can be set as jumper JP4. Fall Edge Rise Edge Figure 2.6 Jumper JP4 setting Signal Connection There are three DIO connector. The pin assignment of the 37 pins D-type connector CN3, which is an isolated DIO signal connector, is shown in Figure 2.7. - Page 20 IDI_0 (20) IDI_1 IDI_2 (21) IDI_3 IDI_4 (22) IDI_5 IDI_6 (23) IDI_7 IDI_8 (24) IDI_9 IDI_10 (25) IDI_11 IDI_12 (26) IDI_13 IDI_14 (27) IDI_15 EIGND (28) EOGND EOGND (10) (29) EOGND ID0_0 (11) (30) ID0_1 ID0_2 (12) (31) ID0_3 ID0_4 (13) (32) ID0_5...
- Page 21 • CN 2: Digital Signal Input (DI 0 - 15) DI 0 DI 1 DI 2 DI 3 DI 4 DI 5 DI 6 DI 7 DI 8 DI 9 DI 10 11 12 DI 11 DI 12 13 14 DI 13 DI 14 15 16...
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Page 22: Counter Signals Connector (Jp5)
2.10 Counter Signals Connector (JP5) There is an internal programmable timer/counter 8254 chip on the ACL-7130. The counter1 and counter 2 are cascaded together for timer pacer generation. The reminder counter 0 is available for flexible usage. Refer figure 2.11. The jumper JP5 is connector for counter 0 and its pin assignment is illustrated as figure 2.10. -
Page 23: Acl-7130 Software Library Installation
3. Type the commands(X indicates the CD ROM driver): X:\> CD Software\Isa_Card\7130\DOS X:\ Software\Isa_Card\7130\DOS> SETUP 4. An installation completed message will be shown on the screen. After installation, all the files of ACL-7130 Library & Utility for DOS are stored in C:\ADLink\7130\DOS directory. Installation • 17... -
Page 25: Register Structure & Programming
Register Structure & Programming I/O Registers Format The ACL-7130 requires 8 consecutive addresses in the PC I/O address space. The I/O address map is compatible with PCL- 730 but which one more timer / counter chip. Table 3.1 shows the I/O address of each register with respect to the base address. -
Page 26: Digital Input Register
Digital Input Register There are total 32 digital input channels on the ACL-7130, including 16 isolated DI channels and 16 non-isolated channels. Each bit is corresponding to a signal on the connector. Address : BASE + 0 ~ BASE + 3... -
Page 27: Timer/Counter Registers
Timer/Counter Registers The 8254 occupy 4 I/O address locations in the ACL-7130 as shown blow. Users can refer to NEC's or Intel's data sheet for a full description of the 8254 features; condensed information is specified in Section 3.6. Address : BASE + 4 ~ BASE + 7... - Page 28 Programming Language The programming language to be used is dependent on users' familiarity and the system requirement. No matter what kind of language is used, the user must understand the syntax of the I/O instructions to access the I/O card. The following sections introduce the syntax of the often-used programming languages.
- Page 29 To read an input port #define BASE 0x300 unsigned int Value; Value = inpportb (BASE+2); Value = inportb (0x302); C language (MicroSoft C) To write an output port: #define BASE 0x300 unsigned int Value=0x2F; outp (BASE+2 , Value) ; outp (0x302 , 0x2F); To read an input port #define BASE...
- Page 30 For example : In BASIC , 05 BASE=&H300 10 VALUE1 = INP(BASE + 0) ‘Read DO0 ~ DI 7 20 VALUE2 = INP (BASE + 2) ‘Read DO16 ~ DI 23 Write operation : The digital output states are written as 1 single byte to the port at address BASE+N (N=0,1,2,3).
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Page 31: Programmable Interval Timer
For more information about the 8254 , please refer to the NEC Microprocessors and peripherals or Intel Microprocessor and Peripheral Handbook. 3.6.2 The Control Byte The 8254 occupies 8 I/O address locations in the ACL-7130 I/O map. As shown below. Base + 4 LSB OR MSB OF COUNTER 0... - Page 32 Control Byte : (Base + 7) • SC1 & SC1 - Select Counter (Bit7 & Bit 6) COUNTER ILLEGAL • RL1 & RL0 - Select Read/Load Operation (Bit 5 & Bit 4) OPERATION COUNTER LATCH READ/LOAD LSB READ/LOAD MSB READ/LOAD LSB FIRST, THEN MSB •...
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Page 33: Mode Definition
3.6.3 Mode definition In 8254, there are six different operating modes can be selected. The they are : • Mode 0 : interrupt on terminal count The output will be initially low after the mode set operation. After the count is loaded into the selected count register, the output will remain low and the counter will count. - Page 34 The gate input when low would force the output high. When the gate input goes high, the counter will start form the initial count. Thus, the gate input can be used to synchronize by software. When this mode is set, the output will remain high until after the count register is loaded.
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Page 35: Programming In High Level Language
4. Win-NT 4.0 : 32-bit Dynamic Linking Library (DLL) * C/C++ library for DOS is also included in “Manual & Software Utility” CD, which is supplied with ACL-7130. Please refer to section 2.11 of this manual for description of the installation of the ACL-7130 software library. -
Page 37: Appendix A. I/O Port Address Map
Appendix A. I/O Port Address I/O Address Device 000-01F DMA controller 1 020-03F interrupt controller 040-05F Timer 060-06F Keyboard 070-07F Real-time clock 080-09F DMA page register 0A0-0BF interrupt controller 2 0C0-0DF DMA controller 0F0-0FF Math coprocessor 100-1EF not usable 1F0-1F8 Fixed disk 200-207 Game I/O... - Page 38 Isolated Digital Input Channels The isolated digital output is an open collector transistor output. The input accepts voltage form 5V to 24V and input resister is 1.2K Ω. The connection between outside signal and ACL-7130 is shown below. 1.2K Ohm...
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Page 39: Format.
EOGND ACL-7130 Digital I/O Channels The ACL-7130 provides 16 digital input and 16 digital output channels through the connector CN1 and CN2 on board. The digital I/O signal are fully TTL/DTL compatible. Please refer to section 1.3 for the detailed digital I/O (DIO) signal specification, and section 2.9 for the DIO connectors, and section 3.2 for the... -
Page 41: Product Warranty/Service
Product Warranty/Service Seller warrants that equipment furnished will be free form defects in material and workmanship for a period of one year from the confirmed date of purchase of the original buyer and that upon written notice of any such defect, Seller will, at its option, repair or replace the defective item under the terms of this warranty, subject to the provisions and specific exclusions listed herein.
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