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ADLINK Technology NuDAQ User Manual

Pci-7200 / cpci-7200 / lpci-7200s 12mb/s high speed digital i/ o card
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PCI-7200 / cPCI-7200 / LPCI-7200S
12MB/S High Speed Digital I/ O Card
Manual Rev.
Revision Date:
Part No:
Advance Technologies; Automate the World.
NuDAQ / NuIPC
User's Manual
2.00
March 31, 2006
50-11102-1030

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Summary of Contents for ADLINK Technology NuDAQ

  • Page 1 NuDAQ / NuIPC PCI-7200 / cPCI-7200 / LPCI-7200S 12MB/S High Speed Digital I/ O Card User’s Manual Manual Rev. 2.00 Revision Date: March 31, 2006 Part No: 50-11102-1030 Advance Technologies; Automate the World.
  • Page 2 Trademarks NuDAQ, NuIPC, DAQBench are registered trademarks of ADLINK TECHNOLOGY INC. Product names mentioned herein are used for identification pur- poses only and may be trademarks and/or registered trademarks...
  • Page 3 Getting Service from ADLINK Customer Satisfaction is top priority for ADLINK Technology Inc. Please contact us should you require any service or assistance. ADLINK TECHNOLOGY INC. Web Site: http://www.adlinktech.com Sales & Service: Service@adlinktech.com TEL: +886-2-82265877 FAX: +886-2-82265717 Address: 9F, No. 166, Jian Yi Road, Chungho City,...

  • Page 5: Table Of Contents

    Table of Contents Table of Contents..............i List of Tables................vi List of Figures ............... vii 1 Introduction ................ 1 Applications ................. 1 Features................2 Specifications............... 3 Supporting Software ............5 Programming Library ............5 DAQ-LVIEW PnP: LabVIEW® Driver ......6 PCIS-VEE: HP-VEE Driver ..........
  • Page 6 Digital Output Register (BASE + 14)........26 DIO Status & Control Register (BASE + 18)...... 26 Interrupt Status & Control Register (BASE + 1C) ....29 8254 Timer Registers (BASE + 0) ........32 4 Operation Theory .............. 33 Direct Program Control ............33 Timer Pacer Mode .............
  • Page 7 @ Argument ..............49 @ Return Code ............. 49 _7200_AUX_DO_Channel..........50 @ Description ............... 50 @ Syntax ..............50 @ Argument ..............50 @ Return Code ............. 50 _7200_DI ................51 @ Description ............... 51 @ Syntax ..............51 @ Argument ..............51 @ Return Code .............
  • Page 8 @ Argument ..............58 @ Return Code ............. 58 5.16 _7200_Free_DBDMA_Mem..........59 @ Description ............... 59 @ Syntax ..............59 @ Argument ..............59 @ Return Code ............. 59 5.17 _7200_DI_DMA_Start............60 @ Description ............... 60 @ Syntax ..............61 @ Argument ..............
  • Page 9 @ Argument ..............69 @ Return Code ............. 69 5.24 _7200_DO_DMA_Start............70 @ Description ............... 70 @ Syntax ..............70 @ Argument ..............70 @ Return Code ............. 71 5.25 _7200_DO_DMA_Status ........... 72 @ Description ............... 72 @ Syntax ..............72 @ Argument ..............

  • Page 10: List Of Tables

    List of Tables Table 2-1: CN1A Pin Assignments .......... 19 Table 2-2: CN1B Pin Assignments .......... 20 Table 2-3: Pull-ups and termination of PCI/cPCI-7200 and LPCI- 7200S..............22 Table 5-1: Data Types ............. 43 List of Tables...
  • Page 11 List of Figures Figure 2-1: PCI-7200 Layout Diagram ........11 Figure 2-2: cPCI-7200 Layout Diagram ........12 Figure 2-3: LPCI-7200S Layout Diagram........13 Figure 2-4: LPCI-7200S with standard PCI bracket....14 Figure 2-5: CN1 Pin Assignments..........17 Figure 2-6: CN2 Pin Assignments..........17 Figure 2-7: CN Pin Assignments..........

  • Page 13: Introduction

    Introduction The PCI-7200, cPCI-7200, and LPCI-7200S are PCI/CompactPCI/ Low profile PCI form factor high-speed digital I/O cards, consisting of 32 digital input channels, and 32 digital output channels. High performance design and state-of-the-art technology make this card suitable for high-speed digital input and output applications. The PCI-7200 performs high-speed data transfers using bus-mas- tering DMA via the 32-bit PCI bus architecture.

  • Page 14: Features

    1.2 Features The PCI-7200 high-speed DIO Card provides the following advanced features: 32 TTL digital input channels 32 TTL digital output channels Transfer up to 12M Bytes per second High output driving and low input loading 32-bit PCI bus, Plug and Play Onboard internal timer pacer clock Internal timer controls input sampling rate Internal timer controls digital output rate...

  • Page 15: Specifications

    1.3 Specifications Digital I/O (DIO) Number of DI Channels: 32 TTL compatible Number of DO Channels: 32 TTL compatible Data Transfer Mode Program I/O Internal timer pacer transfer External I_REG strobe input Handshake data transfer Maximum Transfer Speed: 3MHz (12MB/sec) by external clock, handshake or external strobe 2MHz (8MB/sec) by internal timer pacer transfer FIFO:...
  • Page 16 Programmable Counter Device: 82C54-10, with a 4MHz time base Timer 0: DI clock source Timer 1: DO clock source Timer2: Base clock of Timer #0 and Timer #1 Pacer Output: 0.00046Hz to 2MHz General Specifications Operating Temperature: 0ºC to 60ºC Storage Temperature: -20ºC to 80ºC Humidity: 5 to 95%, non-condensing Connector:...

  • Page 17: Supporting Software

    1.4 Supporting Software ADLINK provides versatile software drivers and packages for users’ different approach to building a system. We not only provide programming library for many Windows systems, but also provide drivers for many software packages including LabVIEW®, HP , DASYLab , InTouch , InControl , ISaGRAF...

  • Page 18: Daq-Lview Pnp: Labview® Driver

    DAQ-LVIEW PnP: LabVIEW® Driver DAQ-LVIEW PnP contains the VIs, which are used to interface with NI’s LabVIEW® software package. The DAQ-LVIEW PnPW supports Windows 98/NT/2000/XP. The LabVIEW® drivers are shipped free of charge with the board. These can be installed and used without license.

  • Page 19: Pcis-Isg: Isagraftm Driver

    server is included on the ADLINK CD. It requires a license. The DDE server can be used in conjunction with any DDE client under Windows NT. PCIS-ISG: ISaGRAFTM driver The ISaGRAF WorkBench is an IEC1131-3 SoftPLC control pro- gram development environment. The PCIS-ISG includes ADLINK products’...
  • Page 20 Introduction...

  • Page 21: Installation

    Installation This chapter describes how to install the PCI-7200. Package con- tents and unpacking information are described. Because the PCI- 7200 is a Plug and Play device, there are no jumper or DIP switch settings for configuration. The interrupt number and I/O port address are assigned by the system BIOS during system boot up.

  • Page 22: Unpacking

    2.3 Device Installation for Windows Systems Once Windows 95/98/2000 has started, the Plug and Play function of Windows system will find the new NuDAQ/NuIPC cards. If this is the first time to installing NuDAQ/NuIPC cards in this system, Windows will require device information source. Please refer to the “Software Installation Guide”...

  • Page 23: Pci-7200/Cpci-7200/Lpci-7200S Layout

    2.4 PCI-7200/cPCI-7200/LPCI-7200S Layout Figure 2-1: PCI-7200 Layout Diagram Installation...

  • Page 24: Figure 2-2: Cpci-7200 Layout Diagram

    Figure 2-2: cPCI-7200 Layout Diagram Installation...

  • Page 25: Figure 2-3: Lpci-7200S Layout Diagram

    Figure 2-3: LPCI-7200S Layout Diagram Installation...

  • Page 26: Figure 2-4: Lpci-7200S With Standard Pci Bracket

    Figure 2-4: LPCI-7200S with standard PCI bracket Installation...

  • Page 27: Hardware Installation Outline

    2.5 Hardware Installation Outline Hardware configuration These PCI cards (or CompactPCI, Low Profile PCI cards) are equipped with a Plug and Play PCI controller that requests base addresses and interrupts according to PCI standard. The system BIOS will install the system resource based on the PCI cards’...

  • Page 28: Connector Pin Assignments

    2.6 Connector Pin Assignments PCI-7200 Pin Assignments The PCI-7200 comes equipped with one 37-pin D-Sub connector (CN2) located on the rear mounting plate and one 40-pin female flat cable header connector (CN1). The CN2 is located on the rear mounting plate; the CN1 is on front of the board. Refer section 2.4 PCI-7200‘s layout.

  • Page 29: Figure 2-5: Cn1 Pin Assignments

    DI16 DI16 DO16 DO16 DI17 DI17 DO17 DO17 DI18 DI18 DO18 DO18 DI19 DI19 DO19 DO19 DI20 DI20 DO20 DO20 DI21 DI21 DO21 DO21 DI22 DI22 DO22 DO22 DI23 DI23 DO23 DO23 DI24 DI24 DO24 DO24 DI25 DI25 DO25 DO25 DI26 DI26 DO26...

  • Page 30: Cpci-7200 Pin Assignments

    cPCI-7200 Pin Assignments Figure 2-7: CN Pin Assignments Installation...

  • Page 31: Lpci-7200S Pin Assignments

    LPCI-7200S Pin Assignments DIN0 DIN1 DIN2 DIN3 DIN4 DIN5 DIN6 DIN7 DIN8 DIN9 A10 A44 DIN10 A11 A45 DIN11 A12 A46 DIN12 A13 A47 DIN13 A14 A48 DIN14 A15 A49 DIN15 A16 A50 DIN16 A17 A51 DIN17 A18 A52 DIN18 A19 A53 DIN19 A20 A54...

  • Page 32: Table 2-2: Cn1B Pin Assignments

    DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 DOUT6 DOUT7 DOUT8 DOUT9 B10 B44 DOUT10 B11 B45 DOUT11 B12 B46 DOUT12 B13 B47 DOUT13 B14 B48 DOUT14 B15 B49 DOUT15 B16 B50 DOUT16 B17 B51 DOUT17 B18 B52 DOUT18 B19 B53 DOUT19 B20 B54 DOUT20 B21 B55 DOUT21 B22 B56 DOUT22 B23 B57...

  • Page 33: 8254 For Timer Pacer Generation

    2.7 8254 for Timer Pacer Generation 8254 Timer/Counter Timer 0 CLK0 Digital Input Timer Pacer GATE0 OUT0 “H” Timer 1 CLK1 Digital Output Timer Pacer “H” GATE1 OUT1 4MHz Clock Timer 2 CLK2 OUT2 “H” GATE2 Figure 2-8: 8254 configuration The internal timer/counter 8254 on the PCI-7200 is configured as the above diagram (Figure 2.7).

  • Page 34: Lpci-7200S Pci Bus Signaling

    2.8 LPCI-7200S PCI Bus Signaling Low-Profile PCI is a new PCI card standard for space-constrained system designs. The new form factor has the same electrical pro- tocols, PCI signals, and software drivers as standard PCI v2.2 expansion cards. However, the Low-Profile PCI bus interface only supports 3.3V signaling.

  • Page 35: Figure 2-9: Digital Input Pull-Up Resistor And Termination Circuit Diagram

    Figure 2-9: Digital input pull-up resistor and termination circuit diagram. Installation...
  • Page 36 Installation...

  • Page 37: Register Format

    Register Format 3.1 I/O Registers Format The PCI-7200 occupies eight consecutive 32-bit I/O addresses in the PC I/O address space. The cPCI-7200 occupies nine consecu- tive 32-bit I/O addresses. Table 4-1 shows the I/O Map. Address Read Write Base + 0 Counter 0 Counter 0 Base + 4...

  • Page 38: Digital Output Register (Base + 14)

    3.3 Digital Output Register (BASE + 14) 32 digital output channels can be written and read to/from this reg- ister Address: BASE + 14 Attribute: READ/WRITE Data Format: Byte Base +14 DO7 Base +15 DO15 DO14 DO13 DO12 DO11 DO10 DO9 Base +16 DO23 DO22 DO21 DO20 DO19 DO18 DO17 DO16 Base +17 DO31 DO30 DO29 DO28 DO27 DO26 DO25 DO24 The digital output status can be read back through the same loca-...
  • Page 39 I_REQ: Input REQ Strobe Enabled 1: Use I_REQ edge to latch input data 0: I_REQ is disabled I_TIME0: Input Timer 0 Enable 1: Input is sampled by falling edge of Counter 0 output (COUT0) 0: Input Timer 0 is disabled I_FIFO: Input FIFO Enable Mode 1: Input FIFO is enabled (input data is saved to input FIFO) 0: Input FIFO is disabled...
  • Page 40 put FIFO to DO registers when output of Counter1 goes low 0: Output Counter 1 is disabled O_FIFO: Output FIFO Enable 1: Output FIFO is enabled (output data is moved from output FIFO) 0: Output FIFO is disabled O_TRG: Digital Output Trigger Signal This bit is used to control the O_TRG output of PCI-7200;...

  • Page 41: Interrupt Status & Control Register (Base + 1C)

    3.5 Interrupt Status & Control Register (BASE + 1C) The interrupt mode/status is set/checked through this register. Address: BASE + 1C Attribute: READ/WRITE Data Format: Byte Base +1C SI_TO SI_REQ SO_ACK T2_EN T1_EN T0_EN II_REQ IO_ACK Base +1D FIFOFF FIFOEF FIFORST REQ_NEG T1_T2 T0_T2 SI_T2 SI_T1 Base +1E...
  • Page 42 The following bits are used to check interrupt status: SO_ACK: Status of O_ACK interrupt 1: O_ACK Interrupt occurred 0: No O_ACK interrupt SI_REQ: Status of I_REQ interrupt 1: I_REQ Interrupt occurred 0: No I_REQ Interrupt SI_T0: Status of timer 0 interrupt 1: OUT0 (output of timer 0) Interrupt occurred 0: No timer 0 Interrupt SI_T1: Status of timer 1 interrupt...
  • Page 43 clock input. I_REQ Polarity Selection: When the input sampling is controlled by the I_REQ signal only, the I_REQ can be programmed to be rising edge active or falling edge active. REQ_NEG: I_REQ trigger polarity 1: latch input data on falling edge of I_REQ 0: latch input data on rising edge of I_REQ FIFO Control and Status (cPCI-7200 only): The cPCI-7200 has an extra 2k samples digital input FIFO.

  • Page 44: 8254 Timer Registers (Base + 0)

    3.6 8254 Timer Registers (BASE + 0) The 8254 timer/counter IC occupies four I/O address. Users can refer to Tundra's or Intel's data sheet for a full description of the 8254 features. Download the 8254 data sheet from the following web site: http://support.intel.com/support/controllers/peripheral/231164.htm http://www.tundra.com (for Tundra’s 82C54 datasheet).

  • Page 45: Operation Theory

    Operation Theory In PCI-7200, there are four data transfer modes can be used for digital I/O access and control, these modes are: 1. Direct Program Control: the digital inputs and outputs can be read/written and controlled by its corresponding I/ O port address directly.

  • Page 46: Timer Pacer Mode

    4.2 Timer Pacer Mode The digital I/O access control is clocked by timer pacer, which is generated by an interval programming timer/counter chip (8254). There are three timers on the 8254. Timer 0 is used to generate timer pacer for digital input and timer 1 is used for digital output. The configuration is illustrated as below.

  • Page 47: External Clock Mode

    4.3 External Clock Mode The digital input is clocked by external strobe, which is from Pin 19 (I_REQ) of CN2 (PCI-7200), Pin 24 of CN1 (cPCI-7200), or PIN 33 of CN1A (LPCI-7200S). The operation sequence is very similar to the Timer Pacer Trigger. The only difference is the clock source. 1.

  • Page 48: Handshaking

    4.4 Handshaking The PCI-7200 also supports a handshaking digital I/O transfer mode. That is, after input data is ready, an I_REQ is sent from an external device, and I_ACK will go high to acknowledge the data already accessed. I_REQ & I_ACK for Digital Input 1.
  • Page 49 O_REQ & O_ACK for Digital Output 1. Digital Output Data is moved from PC memory to FIFO of PCI-7200 by using DMA data mastering data transfer. 2. Move output data from FIFO to digital output circuit. 3. Output data is ready. 4.

  • Page 50: Timing Characteristic

    4.5 Timing Characteristic 1. I_REQ as input data strobe (Rising Edge Active) IN_ I_REQ D10~DI31 valid data valid data ≥ ≥ ≥ 60ns tI 60ns tCYC 5 PCI CLK Cycle ≥ ≥ 30ns 2. I_REQ as input data strobe (Falling Edge Active) IN_R I_REQ D10~DI31 valid data...
  • Page 51 3. I_REQ & I_ACK Handshaking IN I_REQ IN I_ACK valid data D10~DI31 valid data ≥ ≥ ≥ 60ns 2 PCI CLK Cycle ≥ ≥ 0ns t4 1 PCI CLK Cycle Note: I_REQ must be asserted until I_ACK asserts, I_ACK will be asserted until I_REQ de-asserts.
  • Page 52 Operation Theory...

  • Page 53: C++ Libraries

    C/C++ Libraries This chapter describes the software library for operating the card. Only the functions in DOS library and Windows 95 DLL are described. Please refer to the PCIS-DASK function reference manual, included on the ADLINK CD, for descriptions of the Win- dows 98/NT/2000 DLL functions.

  • Page 54: Libraries Installation

    5.1 Libraries Installation Please refer to the “Software Installation Guide” for the detailed information about how to install the software libraries for DOS, or Windows 95 DLL, or PCIS-DASK for Windows 98/NT/2000. Device drivers and DLL functions of Windows 98/NT/2000 are included in the PCIS-DASK.

  • Page 55: Programming Guide

    5.2 Programming Guide Naming Convention The functions of the NuDAQ PCI cards or NuIPC CompactPCI cards’ software drivers use full-names to represent the functions' real meaning. The naming convention rules are: In DOS: _{hardware_model}_{action_name}. e.g. _7200_Initial(). All functions in the PCI-7200 driver are named with 7200 as {hardware_model}.

  • Page 56: 7200_Initial

    5.3 _7200_Initial @ Description A PCI-7200 card is initialized according to the card number. Because the PCI-7200 is PCI bus architecture and meets the Plug and Play design, the IRQ and base_address (pass-through address) are assigned by system BIOS directly. Every PCI-7200 card has to be initialized by this function before calling other func- tions.
  • Page 57 ERR_PCIBiosNotExist ERR_PCICardNotExist ERR_PCIIrqNotExist ERR_BaseAddressError C/C++ Libraries...

  • Page 58: 7200_Switch_Card_No

    5.4 _7200_Switch_Card_No @ Description After initializing more than one PCI-7200 card, this function is used to select which card is currently used. @ Syntax Visual C++ (Windows 95) int W_7200_Switch_Card_No (U8 card_number) Visual Basic (Windows 95) W_7200_Switch_Card_No (ByVal card_number As Byte) As Long C/C++ (DOS) int _7200_Switch_Card_No (U8 card_number)

  • Page 59: 7200_Aux_Di

    5.5 _7200_AUX_DI @ Description Read data from auxiliary digital input port of cPCI-7200 card. All four bits input data can be found by using this function. @ Syntax Visual C++ (Windows 95) int W_7200_AUX_DI (U32 *aux_di) Visual Basic (Windows 95) W_7200_DI (aux_di As Long) As Long C/C++ (DOS) int _7200_DI (U32 *aux_di)

  • Page 60: 7200_Aux_Di_Channel

    5.6 _7200_AUX_DI_Channel @ Description Read data from the auxiliary digital input channel of cPCI-7200 card. There are four digital input channels on the cPCI-7200 auxil- iary digital input port. When performing this function, the auxiliary digital input port is read and the value of the corresponding chan- nel is returned.

  • Page 61: 7200_Aux_Do

    5.7 _7200_AUX_DO @ Description Write data to auxiliary digital output port. There are four auxiliary digital outputs on the cPCI-7200. @ Syntax Visual C++ (Windows 95) int W_7200_AUX_DO (U32 aux_do) Visual Basic (Windows 95) W_7200_AUX_DO (ByVal aux_do As Long) As Long C/C++ (DOS) int _7200_AUX_DO (U32 aux_do) @ Argument...

  • Page 62: 7200_Aux_Do_Channel

    5.8 _7200_AUX_DO_Channel @ Description Write data to auxiliary digital output channel (bit). There are four auxiliary digital output channels on the cPCI-7200. When perform- ing this function, the digital output data is written to the corre- sponding channel. * channel means each bit of digital input port @ Syntax Visual C++ (Windows 95) int W_7200_AUX_DO_Channel (U8 do_ch_no, Boolean...

  • Page 63: Description

    5.9 _7200_DI @ Description This function is used to read data from digital input port. There are 32-bit digital inputs on the PCI-7200. Use this function to get all 32 inputs data from _7200_DI. @ Syntax Visual C++ (Windows 95) int W_7200_DI (U32 *di_data) Visual Basic (Windows 95) W_7200_DI (di_data As Long) As Long...

  • Page 64: 7200_Di_Channel

    5.10 _7200_DI_Channel @ Description This function is used to read data from digital input channels (bit). There are 32 digital input channels on the PCI-7200. When this function is performed, the digital input port is read and the value of the corresponding channel is returned.

  • Page 65: 7200_Do

    5.11 _7200_DO @ Description This function is used to write data to the digital output port. There are 32 digital outputs on the PCI-7200. @ Syntax Visual C++ (Windows 95) int W_7200_DO (U32 do_data) Visual Basic (Windows 95) W_7200_DO (ByVal do_data As Long) As Long C/C++ (DOS) int _7200_DO (U32 do_data) @ Argument...

  • Page 66: 7200_Do_Channel

    5.12 _7200_DO_Channel @ Description This function is used to write data to digital output channels (bit). There are 32 digital output channels on the PCI-7200. When per- forming this function, the digital output data is written to the corre- sponding channel. * channel means each bit of digital input port @ Syntax Visual C++ (Windows 95)

  • Page 67: 7200_Alloc_Dma_Mem

    5.13 _7200_Alloc_DMA_Mem @ Description Contact the Windows 95/98 system to allocate a block of contigu- ous memory for single-buffered DMA transfer. This function is only available in Windows 95/98. @ Syntax Visual C++ (Windows 95) int W_7200_Alloc_DMA_Mem (U32 *buff, U32 *handle, U32 buf_size, U32 *actual_size) Visual Basic (Windows 95) W_7200_Alloc_DMA_Mem (buff As Long, handle As...

  • Page 68: Return Code

    @ Return Code ERR_NoError ERR_SmallerDMAMemAllocated C/C++ Libraries...

  • Page 69: 7200_Free_Dma_Mem

    5.14 _7200_Free_DMA_Mem @ Description Releases system DMA memory. This function is only available in Windows 95/98. @ Syntax Visual C++ (Windows 95) int W_7200_Free_DMA_Mem (U32 handle) Visual Basic (Windows 95) W_7200_Free_DMA_Mem (ByVal handle As Long ) As Long @ Argument handle : The handle of system DMA memory to release.

  • Page 70: 7200_Alloc_Dbdma_Mem

    5.15 _7200_Alloc_DBDMA_Mem @ Description Contact Windows 95/98 system to allocate a block of contiguous memory as circular buffer for double-buffered DMA DI transfer. This function is only available in Windows 95/98 version. For dou- ble-buffered transfering, please refer to Section 6 “Double Buff- ered Mode Principle”.

  • Page 71: 7200_Free_Dbdma_Mem

    5.16 _7200_Free_DBDMA_Mem @ Description Releases a system’s circular buffer DMA memory. This function is only available in Windows 95/98. For double-buffered transfer principle, please refer to Section 6 “Double Buffered Mode Princi- ple”. @ Syntax Visual C++ (Windows 95) int W_7200_Free_DBDMA_Mem (U32 handle) Visual Basic (Windows 95) W_7200_Free_DBDMA_Mem (ByVal handle As Long ) As Long...

  • Page 72: 7200_Di_Dma_Start

    5.17 _7200_DI_DMA_Start @ Description The function will perform digital input N times with DMA data trans- fer by using one of the following four sampling modes: 1. pacer trigger (internal timer trigger) 2. external rising edge I_REQ 3. external falling edge I_REQ 4.

  • Page 73: Syntax

    bus master operation and can be a large number up to 64 million (2^26) bytes. Since PCI-7200 transfers are always long words, this equals to 16 million long words (2^24). 3. After the input sampling is started, the input data is stored in the FIFO of PCI controller.

  • Page 74: Argument

    Visual Basic (Windows 95) W_7200_DI_DMA_Start (ByVal mode As Byte, ByVal count As Long, ByVal handle As Long, ByVal wait_trg as Byte, ByVal trg_pol As Byte, ByVal clear_fifo As Byte, ByVal disable_di As Byte) As Long C/C++ (DOS) int _7200_DI_DMA_Start (U8 mode, U32 count, U32 *di_buffer, Boolean wait_trig, U8 trig_pol, Boolean clear_fifo, Boolean disable_di) @ Argument...

  • Page 75: Return Code

    DI_WAITING : the input samples waiting rising or falling edge trig- ger to start DI trig_pol : trigger polarity DI_RISING : rising edge trigger DI_FALLING : falling edge trigger clear_fifo : 0: retain the FIFO data 1: clear FIFO data before perform digital input disable_di : 0: digital input operation still active after DMA transfer com- plete...

  • Page 76: 7200_Di_Dma_Status

    5.18 _7200_DI_DMA_Status @ Description Since the _7200_DI_DMA_Start function is executed in back- ground, users can issue this function to check its operation status. This function only works when double-buffer mode is set as dis- able. @ Syntax Visual C++ (Windows 95) int W_7200_DI_DMA_Status (U8 *status, U32 *count) Visual Basic (Windows 95) W_7200_AD_Status (status As Byte, count As Long )

  • Page 77: 7200_Di_Dma_Stop

    5.19 _7200_DI_DMA_Stop @ Description This function is used to stop the DMA data transferring. After exe- cuting this function, the _7200_DI_DMA_Start function is stopped. The function returns the number of the data which has been trans- ferred, regardless if the digital input DMA data transfer is stopped by this function or by the DMA terminal count, ISR.

  • Page 78: 7200_Dblbuffermode

    5.20 _7200_DblBufferMode @ Description This function is used to enable or disable double buffer mode for DMA DI operation. @ Syntax Visual C++ (Windows 95) int W_7200_DblBufferMode (Boolean db_flag) Visual Basic (Windows 95) W_7200_DblBufferMode (ByVal db_flag As Byte) As Long C/C++ (DOS) int _7200_CheckHalfReady (Boolean db_flag) @ Argument...

  • Page 79: 7200_Checkhalfready

    5.21 _7200_CheckHalfReady @ Description When you use _7200_DI_DMA_Start to sample digital input data and double buffer mode is set as enable. Users must use _7200_CheckHalfReady to check data ready (data half full) or not in the circular buffer, and using _7200_DblBufferTransfer to get data.

  • Page 80: 7200_Dblbuffertransfer

    5.22 _7200_DblBufferTransfer @ Description Use this function to copy the input data in the circular buffer to the transfer buffer. It copies half of the circular buffer, either first half or second half, to the transfer buffer. @ Syntax Visual C++ (Windows 95) int W_7200_DblBufferTransfer (U32 *userBuffer) Visual Basic (Windows 95) W_7200_DblBufferTransfer (userBuffer As Long) As...

  • Page 81: 7200_Getoverrunstatus

    5.23 _7200_GetOverrunStatus @ Description When using _7200_DI_DMA_Start to convert Digital I/O data with double buffer mode enabled, using _7200_DblBufferTransfer to move converted data then double buffer overrun will occur. Use this function to check overrun count. @ Syntax Visual C++ (Windows 95) int W_7200_GetOverrunStatus (U32 * overrunCount) Visual Basic (Windows 95) int W_7200_GetOverrunStatus (overrunCount As...

  • Page 82: 7200_Do_Dma_Start

    5.24 _7200_DO_DMA_Start @ Description The function will perform digital output N times with DMA data transfer by using the following four sampling modes: 1. Pacer trigger (internal timer trigger, TIME 1) 2. Internal timer pacer with O_REQ enabled 3. O_REQ & O_ACK handshaking It takes place in the background which will not be stopped until the Nth conversion has been completed or the program executes the _7200_DO_DMA_Stop function to stop the process.

  • Page 83: Return Code

    W_7200_Alloc_DMA_Mem must be called to allocate a contigu- memory handle Also W_7200_Alloc_DMA_Mem will attach a buffer to DMA memory. The DO data is stored in the buffer attached to this handle. do_buffer (DOS): the start address of the memory buffer to store the DO data.

  • Page 84: 7200_Do_Dma_Status

    5.25 _7200_DO_DMA_Status @ Description Since the _7200_DO_DMA_Start function is executed in back- ground, users can issue the function _7200_DO_DMA_Status to check its operation status. @ Syntax Visual C++ (Windows 95) int W_7200_DO_DMA_Status (U8 *status, U32 * count) Visual Basic (Windows 95) W_7200_DO_Status ( status As Byte, count As Long ) As Long C/C++ (DOS)

  • Page 85: 7200_Do_Dma_Stop

    5.26 _7200_DO_DMA_Stop @ Description This function is used to stop the DMA DO operation. After execut- ing this function, the _7200_DO_DMA_Start function is stopped. The function returns the number of the data which has been trans- ferred, regardless if the digital output DMA data transfer is stopped by this function or by the DMA terminal count ISR.

  • Page 86: 7200_Di_Timer

    5.27 _7200_DI_Timer @ Description This function is used to set the internal timer pacer for digital input. There are two configurations for the internal timer pacer: 1. Non-cascaded (One COUNTER 0 only) 8254 Timer/Counter 4MHz Input Counter 0 CLK0 GATE0 OUT0 Digital Input Trigger Timer pacer frequency = 4Mhz / C0...

  • Page 87: Argument

    @ Argument c0 : frequency divider of Counter #0. Valid value ranges from 2 to 65535. c2 : frequency divider of Counter #2. Valid value ranges from 2 to 65535. Note: Since the Integer type in Visual Basic is a signed integer. Its range is within -32768 and 32767.

  • Page 88: 7200_Do_Timer

    5.28 _7200_DO_Timer @ Description This function is used to set the internal timer pacer for digital out- put. There are two configurations for the internal timer pacer: 1. Non-cascaded (One COUNTER 0 only) 8254 Timer/Counter 4MHz Input Counter 1 CLK0 GATE0 OUT0 Digital Output Trigger...

  • Page 89: Argument

    @ Argument c1 : frequency divider of Counter #1 c2 : frequency divider of Counter #2 Note : Since the Integer type in Visual Basic is a signed integer. Its range is within -32768 and 32767. In Visual Basic, to set c1 or c2 to a value larger than 32767, set it as the intended val- ue minus 65536.
  • Page 90 C/C++ Libraries...

  • Page 91: Double Buffer Mode Principle

    Double Buffer Mode Principle The data buffer for a double-buffered DMA DI operation is logically a circular buffer divided into two equal halves. The double buffered DI begins when the device starts writing data into the first half of the circular buffer (Figure 6-1a). After device begins writing to the second half of the circular buffer, users can copy the data from the first half into the transfer buffer (Figure 6-1b).
  • Page 92 half-full and ready for copying to the transfer buffer. Then call _7200_DblBufferTransfer() to copy data from the ready half buffer to the transfer buffer. In Windows 95, W_7200_Alloc_DBDMA_Mem() is needed to allo- cate a contiguous DMA memory for the circular buffer. The buf_size argument of W_7200_Alloc_DBDMA_Mem() is the half size of circular buffer in byte, that is, the size of each half buffer in byte.

  • Page 93: Limitations

    Limitations The 12MB/sec data transfer rate can only be possibly achieved in systems where the PCI-7200 card is the only device using the bus, but the speed cannot be guaranteed due to the limited FIFO depth. The PCI-7200 supports three input clock modes, internal clock, external clock, and handshaking modes.
  • Page 94 Limitations...

  • Page 95: Warranty Policy

    Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the follow- ing carefully. 1. Before using ADLINK’s products please read the user man- ual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA appli- cation form which can be downloaded from: http:// rma.adlinktech.com/policy/.
  • Page 96 3. Our repair service is not covered by ADLINK's guarantee in the following situations: Damage caused by not following instructions in the User's Manual. Damage caused by carelessness on the user's part dur- ing product transportation. Damage caused by fire, earthquakes, floods, lightening, pollution, other acts of God, and/or incorrect usage of voltage transformers.

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