Reading The Registers; Clearing The Registers; Status Byte And Service Request - Keithley 2280 Series Reference Manual

Series 2280 Precision Measurement DC Power Supplies Reference Manual

Reading the registers

You can read any register in the Status Model. The response is a decimal value that indicates which
bits in the register are set. See
convert the decimal value to bits.
You can use the query commands in the
commands to read registers. For example, you can send the following command to read the Status
Enable Register of the Standard Event Register:
*ese?

Clearing the registers

Registers in the status model can be cleared using commands or by instrument actions. When a
registered is cleared, the bits in the register are set to 0.
The event log and all registers are cleared when instrument power is cycled.
Send the command *CLS to clear the following event registers and error queue:

Standard Event Register

Operation Event Register

Operation Instrument Event Register

Operation Instrument Summary Event Register

Questionable Event Register

Questionable Instrument Event Register

Questionable Instrument Summary Event Register

Measurement Event Register

Measurement Instrument Event Register

Measurement Instrument Summary Event Register

Status Byte register

Error queue
In addition to this command, any enable register can be reset by sending the 0 parameter value with
the individual command to program the register.

Status byte and service request

The Status Byte Register monitors the registers and queues in the status model and generates
service requests (SRQs).
When bits are set in the status model registers and queues, they generate summary messages that
set or clear bits of the Status Byte Register. You can enable these bits to generate an SRQ.
Service requests (SRQs) instruct the controller that the instrument needs attention or that some event
has occurred. When the controller receives an SRQ, the controller can interrupt existing tasks to
perform tasks that address the request for service.
077085501 / February 2015
Register bit descriptions
STATus subsystem
Appendix D: Status model
(on page D-8) for information on how to
(on page 7-82) or send common
D-5