Mitsubishi Electric MELSEC iQ-R Series Programming Manual page 127

Block PAUSE/RESTART bit
This bit is a device or label to pause or restart an active block.
Setting the bit to on stops the block at the step in execution and setting it to off restarts executing the block from the step
where the block was stopped previously.
Setting
OFFON
ONOFF
• If another block has been started by a block start step, turning on the block PAUSE/RESTART bit stops the specified block,
but the start destination block will remain active and continue processing. To stop the start destination block at the same
time, the start destination's block PAUSE/RESTART bit must also be turned off.
• When the block PAUSE/RESTART bit specified in an inactive block is turned on, the block does not operate in inactive state
and is put in the stopped state immediately when it becomes active.
• Even after the specified block is forcibly terminated, the state of the block PAUSE/RESTART bit remains held. If the block is
forcibly terminated while it is stopped and the status of the block PAUSE/RESTART bit is not changed, the block is put in
stopped state immediately after the restart.
Operation when the block is paused or restart depends on the combination of the SM325 (Output mode at block stop) status,
block stop mode bit setting of the SFC information device, and step hold status. ( Page 133 Operation when the block is
paused or restarted)
■ Precautions
• The block PAUSE/RESTART bit is not turned off when the SFC program starts or ends.
Block stop mode bit
This bit is a device or label that determines the timing for stopping a block.
Setting the bit to on stops the block after transition of each step and setting it to off stops all steps immediately.
Setting
Off (immediate stop)
On (stop after transition)
Operation when the block is paused or restart depends on the combination of the SM325 (Output mode at block stop) status,
block stop mode bit setting of the SFC information device, and step hold status. ( Page 133 Operation when the block is
paused or restarted)
■ Precautions
• The block stop mode bit is not turned off when the SFC program starts or ends.
Description
When this bit is turned on, the specified block stops at the step being executed.
When this bit is turned off, the specified block restarts execution from the action of the step that has been stopped
previously.
• An operation HOLD step (without transition check) [SE] or an operation HOLD step (with transition check) [ST]
which has been stopped in operation hold state is restarted with the state in effect.
• The coil HOLD step [SC] cannot be restarted in hold state since the step is deactivated when it stops with the coil
output is set to off (SM325 is off). If the step stops with the coil output hold setting (SM325 is on), it keeps the hold
state even after it restarts.
Description
The block is put in stopped state immediately when a stop request is issued.
When a stop request is issued, the block is stopped after the transition for the step being executed becomes TRUE
and a transition occurs.
The action of the step is not executed after the transition.
When the block has multiple active steps, the steps are stopped in order from the one for which the transition
becomes TRUE.
A step that holds an operation stops immediately after a stop request is issued regardless of the setting of the block
stop mode bit.
8 SFC PROGRAM
8.4 SFC Information Devices
8
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