Brother PT-D600 Service Manual page 168

 Main PCB circuit diagram (3/5)
FROM SECTION
3.3VCC
FROM_CS2
8B
GND
3.3VCC
FROM_CS1
8B
2-6D/6D/4-1F WR0
RD
2-7C/6D/4-1F/4-1D
RESET
2-2C/4-4D
AB[1]
AB[2]
AB[3]
AB[4]
GND
AB[5]
AB[6]
AB[7]
AB[8]
AB[9]
AB[10]
AB[11]
AB[12]
AB[13]
AB[14]
AB[15]
AB[16]
AB[17]
AB[18]
AB[19]
AB[20]
AB[21]
AB[22]
AB[1-22]
AB[23]
2-8D/5D/7E/2-7C/7C
6B
* In D600, either 1 FROM chip of 256MBit or both (256Mbit x 2) FROM chips will be
mounted based on the requirement.
256Mbit FROM
3.3VCC
U9
TP159
32 43
CE VCC
13 29
WE VIO
34
OE
3.3VCC
16 52
WP/ACC VSS_52
3.3VCC 33
VSS_33
53
BYTE
GND
14
RESET
17
RY/BY
31
A0
26
A1
25 27
A2 NC27 NC
24 28
A3 NC28 NC
23 30
A4 NC30 NC
22
A5
21
A6
20
A7
10
A8
9
A9
8 35
A10 DQ0
7 37
A11 DQ1
6 39
A12 DQ2
5 41
A13 DQ3
4 44
A14 DQ4
3 46
A15 DQ5
54 48
A16 DQ6
19 50
A17 DQ7
18 36
A18 DQ8
11 38
A19 DQ9
12 40
A20 DQ10
15 42
A21 DQ11
2 45
A22 DQ12
1 47
A23 DQ13
56 49
NC
NC56 DQ14
55 51
NC NC55 DQ15/A-1
S29GL256S90TFI020
A63248001
256Mbit FROM
3.3VCC
U10
TP160
32 43
CE VCC
TP161
13 29
WE VIO
34
OE
3.3VCC
16 52
WP/ACC VSS_52
33
VSS_33
3.3VCC
53
3.3VCC
BYTE
TP162
14
GND
RESET
TP163
17
RY/BY 2-6C
RY/BY
31
A0
26
A1
25 27
A2 NC27 NC
24 28
A3 NC28 NC
23 30
A4 NC30 NC
22
A5
21
A6
20
A7
10
A8
9
A9
8 35 AD[0]
A10 DQ0
7 37 AD[1]
A11 DQ1
6 39 AD[2]
A12 DQ2
5 41 AD[3]
A13 DQ3
4 44 AD[4]
A14 DQ4
3 46
AD[5]
A15 DQ5
54 48
AD[6]
A16 DQ6
19 50
AD[7]
A17 DQ7
18 36
AD[8]
A18 DQ8
11 38
AD[9]
A19 DQ9
12 40
AD[10]
A20 DQ10
15 42
AD[11]
A21 DQ11
2 45 AD[12]
A22 DQ12
1 47 AD[13]
AB[24] A23 DQ13
5C 56 49 AD[14]
NC NC56 DQ14
55 51 AD[15]
NC NC55 DQ15/A-1
S29GL256S90TFI020
A63248001
GND GND
AD[0-15]
2-5A/2-6A/2-7D/7E/4-1D
APP 2 - 3
Bank Switching Logic for FROM and Decoding logic SRAM
3.3VCC
3.3VCC
U11
C52
8
25VDC 3.3VCC
VCC
C103
GND
4
GND
TP166 GND TP183
R109
1 7 100
2-6B/5B/6B/6C
CS0_FROM 1A 1Y
TP181
TP167
2 6
2-2C FROM_AB[25] 1B 2B CS3_FROM 2-4A
TP169
3 5
CS0_FROM 2-6B/5A/5B/6C
2Y 2A
74LVC2G08GT
A40473001
R99
100
GND
3.3VCC
U12
C51
8
25VDC
VCC
C103
GND
4
GND
GND
TP179 TP182
1 7 R105
2-6B/5A/6B/6C CS0_FROM 1A 1Y AB[23] 2F
TP168
TP180 100
2 6
2-6C FROM_AB[23] 1B 2B FROM_AB[24] 2-2C
TP165 TP170
R97
3 5
CS0_FROM 2-6B/5A/5B/6B
2F AB[24] 2Y 2A
100
74LVC2G08GT
A40473001
CS2_SRAM_LCD
GND GND
SRAM 1Mbit / 2Mbit
1Mbit 32Pin STSOP
TP124 TP184
R108
AB[10]
33
U13
RA19
3.3VCC AB[11] 25 24
A11 OE RD
1 8
2-7C/1D/4-1F/4-1D
AB[9] 26 23
A9 A10
2 7 TP178
TP185
AB[8] 27 22
A8 CE1
3 6 RA21
28 21
AB[13]
A13 I/O7
4 5 1
29 20
33
TP164 WR0 WE I/O6
2
2-6D/1D/4-1F 30 19
CE2 I/O5
3.3VCC TP186 3
R100 33 31 18
TP74 AB[15] TP171
A15 I/O4
4
32 17
33
Vcc I/O3
RA22
R104 33 1 16
TP128 AB[17] TP173
NC GND
1
TP130 R101 2 15
AB[16] 33 TP174
A16 I/O2
2
TP123 AB[14] R102 33 3 14
TP175
A14 I/O1
TP187 3
AB[12] R103 4 13
33 TP176
GND
A12 I/O0
TP188 RA20 4
AB[7] 5 12
33
A7 A0
8 8
1 1
AB[6] 6 11
A6 A1
7 7
2 2
AB[5] 7 10
A5 A2
3 6 3 6
AB[4] TP177 8 9
A4 A3
4 5 4 5
RA18 33 33
CY62128EV30LL-45ZAXI
LW2606000
1Mbit: CY62128EV30LL-45ZAXI
GND
2Mbit: CY62138FV30LL-45ZAXI
3.3VCC
3.3VCC
C53
25VDC
C103
GND
U14 TP192
TP189
1 6 R114
A Y0 FROM_CS1 1D
2 5 100
GND Vcc
TP193
TP190
3 4 R115
E Y1 FROM_CS2 1A
100
74LVC1G19GW
A40476001
GND
3.3VCC
3.3VCC
C54
25VDC
C103
GND
U15
TP194
1 6 R116
SRAM_CS 7D
AB[18] A Y0
2 5 100
2-7C/1F
10k R118
GND Vcc
TP191 TP195 3.3VCC
3 4 R117
E Y1 LCD_CS
100 4-1F
2-5A 74LVC1G19GW
A40476001
GND
3.3VCC
SRAM_CS
AD[7] 8C
8
AD[6]
7
AD[5]
6
AD[4]
5
AD[3]
8
AD[2]
7
AD[1]
6
AD[0]
5
AB[0]
AB[1]
AB[2]
AB[3]
MAIN PCB CIR
NAME
PT-D600 (3/5)
CODE