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Zero Cross Detector and 50/60 Hz PLL: Pin ZC_IN
Table 6. ZERO CROSS DETECTOR AND 50/60 HZ PLL
Parameter
Maximum peak input current
Maximum average input current
Mains voltage (ms) range
Rising threshold level
Falling threshold level
Hysteresis
Lock range for 50 Hz (Note 3)
Lock range for 60 Hz (Note 3)
Lock time (Note 3)
Lock time (Note 3)
Frequency variation without going
out of lock (Note 3)
Frequency variation without going
out of lock (Note 3)
Jitter of CHIP_CLK (Note 3)
2. Measured relative to VSS
3. These parameters will not be measured in production since the performance is totally dependent of a digital circuit which will be guaranteed
by the digital test patterns.
NCN49597
Test Conditions
During 1 ms
With protection resistor at
ZC_IN
(Note 2)
(Note 2)
(Note 2)
MAINS_FREQ = 0 (50 Hz)
MAINS_FREQ = 0 (60 Hz)
MAINS_FREQ = 0 (50 Hz)
MAINS_FREQ = 0 (60 Hz)
MAINS_FREQ = 0 (50 Hz)
MAINS_FREQ = 0 (60 Hz)
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9
Symbol
Min
Imp
−20
ZC_IN
Imavg
−2
ZC_IN
V
90
MAINS
VIR
ZC_IN
VIF
0.9
ZC_IN
VHY
0.4
ZC_IN
Flock
45
50Hz
Flock
54
60Hz
Tlock
50Hz
Tlock
60Hz
DF
60Hz
DF
50Hz
Jitter
−25
CHIP_CLK
Typ
Max
Unit
20
mA
2
mA
550
V
1.9
V
V
V
55
Hz
66
Hz
15
s
20
s
0.1
Hz/s
0.1
Hz/s
25
ms
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