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The space and mark frequency can be calculated as:
•
f
= R_FS[15:0]_dec x f
S
•
f
= R_FM[15:0]_dec x f
M
Or the content of both R_FS[15:0] and R_FM[15:0] are
defined as:
•
R_FS[15:0]_dec = Round(2
•
R_FM[15:0]_dec = Round(2
Where f
= 3 MHz is the direct digital
♦
DDS
synthesizer clock frequency.
After a hard or soft reset or at the start of the transmission
(when TX_RXB goes from 0 to 1) the phase accumulator
must start at it's 0 phase position, corresponding with a 0 V
output level. When switching between f
accumulator must give a continuous phase and not restart
from phase 0
BIT_CLK
TX_DATA
TX_RXB
TX_ENB
TX_OUT
PC200 90610.1
DA Converter
A digital to analog SD converter converts the sine wave
digital word to a pulse density modulated (PDM) signal. The
PDM signal is converted to an analog signal with a first order
switched capacitor filter.
Low Pass Filter
rd
A 3
order continuous time low pass filter in the transmit
path filters the quantization noise and noise generated by the
ΣΔ DA converter. The typical corner frequency f
kHz and is internally trimmed to compensate for process
variation. This filter can be tuned to f
described in reference [1].
Amplifier with Automatic Level Control (ALC)
The pin ALC_IN is used for level control of the
transmitter output level. First peak detection is done. The
peak value is compared to two thresholds levels:
VTL
and VTH
ALC_IN
ALC_IN
18
/2
DDS
18
/2
DDS
18
x f
/f
)
S
DDS
18
x f
/f
)
M
DDS
and f
the phase
M
S
Figure 16. TX_ENB Timing
= 138
−3dB
= 1508 kHz as
−3dB
. The result of the peak
http://onsemi.com
NCN49597
When NCN49597 goes into receive mode (when
TX_RXB goes from 1 to 0) the sine wave generator must
make sure to complete the active sine period.
The control logic for the transmitter generates a signal
TX_ENB to enable the external power amplifier. TX_ENB
is 1 when the NCN49597 is in receive mode. TX_ENB is 0
when NCN49597is in transmit mode. When going from
transmit to receive mode (TX_RXB goes from 1 to 0) the
TX_ENB signal is kept active for a short period of t
The control logic for the transmitter generates a signal
TX_DATA which corresponds to the transmitted S−FSK
signal. When transmitting f
transmitting f
TX_DATA is logic 0. When the transmitter
S
is not enabled (TX_RXB = 0) TX_DATA goes to logic 1 at
the next BIT_CLK.
detection is used to control the setting of the level of
TX_OUT. The level of TX_OUT can be attenuated in 8 steps
of 3 dB typical.
After hard or soft reset the level is set at minimum level
(maximum attenuation) When going to reception mode
(when TX_RXB goes from 1 to 0) the level is kept in
memory so that the next transmit frame starts with the old
level. The evaluation of the level is done during 1
CHIP_CLK period.
Depending on the value of peak level on ALC_IN the
attenuation is updated:
•
Vp
< VTL
ALC_IN
step
•
VTL
≤ Vp
ALC
ALC_IN
level
•
Vp
> VTH
ALC_IN
step
22
TX_DATA is logic 1. When
M
t
dTX_ENB
: increase the level with one 6 dB
ALC
≤ VTH
: don't change the
ALC
: decrease the level with one 6 dB
ALC
.
dTX_ENB
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