Table of Contents
Advertisement
The gain changes in the next CHIP_CLK period.
An evaluation phase and a level adjustment take 2
CHIP_CLK periods. ALC operation is enabled only during
the first 16 CHIP_CLK cycles after a hard or soft reset or
after going into transmit mode.
Table 21. FIXED TRANSMITTER OUTPUT ATTENUATION
ALC_CTRL[2:0]
Remark:
Transmitter Output TX_OUT
The transmitter output is DC coupled to the TX_OUT pin.
Because the complete analog part of NCN49597 is
referenced to the analogue ground REF_OUT, a decoupling
capacitor C
is needed when connecting NCN49597 to
1
FROM LINE
DRIVER
R
3
TO TX POWER
OUTPUT STAGE
R
4
Receiver Path Description
Receiver Block Diagram
The receiver takes in the analog signal from the line
coupler, conditions it and demodulates it in a data−stream to
the communication controller. The operation mode and the
baud rate are made according to the setting in R_CONF,
R_FS and R_FM. The receive signal is applied first to a high
pass filter. Therefore NCN49597 has a low noise operational
amplifier at the input stage which can be used to make a high
000
001
010
011
100
101
110
111
C
4
C
3
C
R
R
1
2
1
C
2
V
SSA
Figure 17. TX_OUT Filter
http://onsemi.com
NCN49597
The automatic level control can be disabled by setting
register R_ALC_CTRL[3] = 1. In this case the transmitter
output level is fixed to the programmed level in the register
R_ALC_CTRL[2:0]. See Reference 1.
external circuitry working with another ground. To suppress
the second and third order harmonic of the generated S−FSK
signal it is recommended to use a 2
filter. In Figure 17 a MFB topology of a 2
illustrated.
Transmitter (S− FSK Modulator )
ALC _IN
TX_OUT
TX_EN
pass active filter to attenuate the mains frequency. This high
pass filter output is followed by a gain stage which is used
in an automatic gain control loop. This block also performs
a single ended input to differential output conversion. This
gain stage is followed by a continuous time low pass filter
to limit the bandwidth. A 4
converts the analog signal to digital samples. A quadrature
demodulation for f
DSP, as well the handling of the bits and the frames.
23
Attenuation
0 dB
−3 dB
−6 dB
−9 dB
−12 dB
−15 dB
−18 dB
−21 dB
nd
th
or 4
order low pass
nd
ALC
control
ARM
Interface
&
LP
Control
Filter
th
order sigma delta converter
and f
is than performed by an internal
S
M
order filter is
PC 20091216.1
Advertisement
Table of Contents
