NEC Express5800/T120d User Manual page 72

Express server express5800 series
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Chapter 2 Preparations
(2)
Memory Lock Step Feature (x8 SDDC)
In Memory Lock Step feature, the DIMMs in two groups corresponding to two memory channels (channels 2
and 3) is multiplexed and operated in parallel to enable x8 SDDC (x8 Single Device Data Correction). With this
feature, a single device can detect and correct one to eight-bit error.
72
• Memory Lock Step feature uses channels 2 and 3. In Memory Lock Step configuration,
Note
the memory channel 1 of each CPU (CPU1-DIMM1/4, CPU2-DIMM1/4) is disabled.
• To use Memory LockStep feature (x8 SDDC), install N8102-483/484/485 additional
memory board (two DIMMs of same model).
• Any other memory board than N8102-483/484/485 cannot be installed together.
• To use Memory LockStep feature in 2-CPU configuration, install two sets of 483/484/485
additional memory board (four DIMMs of same model).
• DIMMs to be installed in Lockstep set must have same capacity.
Memory controller
Memory controller
Express5800/T120d User's Guide
1. Installing Internal Optional Devices
LockStep set
#3
LockStep set
#1
LockStep set
#4
LockStep set
#2

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