Transmitter Path, Detailed Circuit Description; Addag; Tx Lo; Lnodct - Motorola MTM700 Detailed Service Manual

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Transmitter Path, Detailed Circuit Description

For the Transmit Path Block Diagram see Figure 3.

ADDAG

The Analog to Digital/Digital to Analog IC U5802 (ADDAG) receives the modulation waveform as
serial data transmitted by the DSP at a 48 kbps rate to the SSI port (pin 33, STD). Data is transmit-
ted as a 16-bit 'I' word followed by a 16-bit 'Q' word. The ADDAG provides a serial clock of 2.4MHz
to the DSP (pin 34, SCK) and sends a frame sync signal (pin 35, SFS) at the beginning of every 'I'
word transmission, to instruct the DSP to send data. In the ADDAG, the received serial I & Q words
are converted into parallel I & Q words, and transferred to an interpolation filter. The interpolation fil-
ter increases the sampling rate to reduce in-band quantization noise, as well as to reduce image at
multiples of the input data. The interpolated samples are rounded to 8 bits, and run through 8-bit D/A
converters. The D/A converters take the digital I & Q words and convert them into analog signals,
which are filtered and amplified. The output is comprised of two separate low-level differential sig-
nals, I & Q (pin 8, OUTI; pin 7, OUTIB; pin 6, OUTQ; pin 5, OUTQB). The output signals are routed
to the LNODCT IC for up conversion to the transmitter operating frequency. The ADDAG sends a
2.4MHz low-level differential reference clock signal (pin 2, TCLCK; pin 1, TCLCKB) to the LNODCT.
It also sends a differential signal (pin 48, TSLOT; pin 47, TSLOTB) that marks the beginning and end
of each transmission slot (whenever a TXE signal {pin 37 TXE} is received from the DSP). After
receiving the TSLOT signal, the LNOCDT toggles the ASW line (pin 10, ASW) which signals the
ADDAG to set VCNTO signal LOW (pin 11, VCNTO) which enables the Antenna Switch during the
transmit slot. The ADDAG starts to receive data from DSP after TXE signal (pin 37, TXE).

Tx LO

The Tx LO signal path processes the signal generated by the Transmit Frequency Translation Loop
(part of the FGU), which determines the operating frequency of the transmitter. The input signal is
amplified by Q5801, and passed to the power splitter (R5804, R5809, R5814). One output of the
power splitter is routed to I-Q splitter U5801 which converts the single input signal into two quadra-
ture (90 degree phase shift) 'I' and 'Q' signals which are subsequently routed to the LNODCT up
conversion LO input (pins 46, LOQ; 45, LOQB; 57, LOI; 56, LOIB). The signal at the second output
of the power splitter is applied to the LNODCT feedback down conversion LO input (pin 24, MVCO).

LNODCT

The Low Noise Offset Direct Conversion Transmitter (LNODCT) U5803 performs the following
tasks:
• up converts the baseband I and Q modulation waveform to the transmitter operating
frequency,
• controls power output, and
• cancels power amplifier distortion products created by non-linearities in the RF power
amplifier output stage.
The differential base-band signals from the ADDAG are input into the LNODCT on pins 58 – 61
(BINQB, BINQ, BINIB and BINI). The baseband I and Q waveforms are passed through a variable
attenuator and then they are summed with the down-converted I & Q feedback signal. The base-
band signal is then amplified and sent to the up-mixer. The up-mixer consists of two mixers, one for
the I channel and the other for the Q channel. The split I & Q LO signal is mixed with the base-band
I & Q signals to produce an I and Q modulated signal at RF frequency. The signal is then output dif-
MTM700 Mobile Radio / Detailed Service Manual THEORY OF OPERATION (400 MHz)