Transmitter Path, Detailed Circuit Description; Addag; Javelin - Motorola MTM800 User Manual

Tetra mobile terminal 450-470 mhz (mt512m) with enhanced control head
Hide thumbs Also See for MTM800:
Table of Contents

Advertisement

4.1 - 12

Transmitter Path, Detailed Circuit Description

For the Transmit Path Block Diagram see Figure 4.1-3 on page 4.1-6.

ADDAG

The Analog to Digital/Digital to Analog IC U5810 (ADDAG) receives the modulation waveform as
serial data transmitted by the DSP at a 48 kbps rate to the SSI port (ball C7, STD). Data is
transmitted as a 16-bit 'I' word followed by a 16-bit 'Q' word. The ADDAG provides a serial clock of
2.4MHz to the DSP (ball B6, SCK) and sends a frame sync signal (ball B7, SFS) at the beginning of
every 'I' word transmission, to instruct the DSP to send data.
In the ADDAG, the received serial I & Q words are converted into parallel I & Q words, and
transferred to an interpolation filter. The interpolation filter increases the sampling rate to reduce in-
band quantization noise, as well as to reduce image at multiples of the input data. The interpolated
samples are rounded to 8 bits, and run through 8-bit D/A converters.
The D/A converters take the digital I & Q words and convert them into analog signals, which are
filtered and amplified. The output is comprised of two separate low-level differential signals, I & Q
(ball E2, OUT1; ball E1, OUT1B; ball D1, OUTQ; ball C1, OUTQB). The output signals are routed to
the JAVELIN IC for up conversion to the transmitter operating frequency. They are also available on
R5841, R5842, R5843 and R5844. The ADDAG sends a 2.4MHz low-level differential reference
clock signal (ball C2, TCLK; ball B1, TCLKB) to the JAVELIN.
It also sends a differential signal (ball A1, TSLOT; ball B2, TSLOTB) that marks the beginning and
end of each transmission slot (whenever a TXE signal {ball B5 TXE} is received from the DSP). After
receiving the TSLOT signal, the JAVELIN toggles the ASW line (ball F2, ASW) which signals the
ADDAG to set VCNTO signal LOW (ball F2, VCNTO) which enables the Antenna Switch during the
transmit slot. The ADDAG starts to receive data from DSP after TXE signal (ball B5, TXE).
Tx LO
The Tx LO signal path processes the signal generated by the Transmit Frequency Translation Loop
(part of the FGU), which determines the operating frequency of the transmitter. The input signal is
amplified by Q5801, and passed to the Balun T5801 which provides the differential signal to the
JAVELIN LO input (balls H5, VCO1 and H6, VCO1B. Internally to the JAVELIN the signal is routed to
the feedback down conversion circuitry and to a 90 degree phase shifter, that provides the I and Q
vectors for up conversion.

JAVELIN

The Low Noise Offset Direct Conversion Transmitter (JAVELIN) U5809 performs the following tasks:
up converts the baseband I and Q modulation waveform to the transmitter operating
frequency,
controls power output, and
cancels power amplifier distortion products created by non-linearities in the RF power
amplifier output stage.
The differential base-band signals from the ADDAG are input into the JAVELIN on balls C1, B1, C3,
B2 (BINQB, BINQ, BINIB and BINI). The baseband I and Q waveforms are passed through a
THEORY OF OPERATION (TRANSCEIVER)

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents