Advantech AIMB-242 User Manual page 87

Intel xeon e3/core i7/i5/i3 bga1440 mini-itx with dual dp/ hdmi/lvds (or edp), 2 com, dual lan, ddr4, pcie x 16, 8 usb 3.0 & 1 usb 2.0 and 2 sataiii
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Enable Root Port [ Auto ]
Max Link Speed [ Auto ]
Detect Non-Compliance Device [ Disabled ]
Detect Non-Compliance PCI Express Device in PEG
Program PCIe ASPM after OpROM [ Disabled ]
Enabled: PCIe ASPM will be programmed after OpROM.
Disabled: PCIe ASPM will be programmed before OpROM.
Program Static Phase1 Eq [ Enabled ]
Always Attempt SW EQ
Always attempt SW EQ, even it has been done once.
Number of Presets to test
Choose between 7, 3, 5 and 0-9. Auto= current default for CPU.
Allow PERST# GPIO Usage
Enable/disable GPIO-based resets to PEG endpoint (s) during margin search, if
needed.
SW EQ Enable VOC
Select Jiffer & VOC test mode (default) or Jitter only test mode. Auto will current
default (Enabled)
Generate BDAT PEG Margin Data
Enable to generate BDAT PCIe margin tables
PCIe Rx CEM Test Mode
Enable/disable PEG Rx CEM loopback mode.
PCIe Spread Spectrum Clocking
Allows disabling spread spectrum clocking for compliance testing
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AIMB-242 User Manual

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