Mode 40: High-Speed Interrupts; Purpose; Functional Block Diagram - Automation Direct DL05 User Manual

Appendix E: High-speed Input and Pulse Output Features

Mode 40: High-Speed Interrupts

1

Purpose

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The HSIO Mode 40 provides a high-speed interrupt to the ladder program. This capability is
provided for your choice of the following application scenarios:
3
• An external event needs to trigger an interrupt subroutine in the CPU. Using immediate I/O
instructions in the subroutine is typical.
D
• An interrupt routine needs to occur on a timed basis which is different from the CPU scan time
(either faster or slower). The timed interrupt is programmable, from 5 to 999 ms.
E

Functional Block Diagram

The HSIO circuit creates the high-speed interrupt to the CPU. The following diagram shows
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the external interrupt option, which uses X0. In this configuration X1 and X2 are normal
filtered inputs.
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8
9
10
11
1
Alternately, you may configure the HSIO circuit to generate interrupts based on a timer, as
1
shown below. In this configuration, inputs X0 through X2 are filtered inputs.
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A
B
C
D
E–44
DL05 Micro PLC User Manual, 6th Edition, Rev. A
DL05
Output Circuit
PLC
Y0, Y1
HSIO
Interrupt
FILTER
X0 X1, X2
Input Circuit
DL05
Output Circuit
PLC
Y0, Y1
HSIO
Interrupt
Timer
FILTER
X0, X1, X2
Input Circuit
Y2 -Y5
I/O data
CPU
Interrupt
V-memory
Mode select
V7633 0040
X3 - X7
Y2 - Y5
I/O data
CPU
Interrupt
V-memory
Mode select
V7633 0040
X3 - X7