Toshiba QOSMIO G10 Maintenance Manual page 21

1 Hardware Overview
Chipset
This gate array has the following elements and functions.
•
North Bridge (Intel 855PM (MCH-M, B-step))
− Pentium-M processor System Bus support
− DRAM Controller : DDR333/DDR266/DDR200 support
− AGP Interface (AGP R2.0, AGP x 4mode)
− Hub Link Interface
− 593-ball 37.5mmx37.5mm FC-BGA Package
•
South Bridge (Intel 82801DBM (ICH4-M))
− PCI slot
− IDE controller
− DMA controller
− USB host interface
− USB 2.0 host controller
− UHCI host controller
− Interrupt controller
− SM Bus interface
− ACPI Power management
− Firmware Hub interface
− Low Pin count (LPC) interface
− Real time clock
− AC'97 Rev. 2.3 interface
− Alert ON LAN (AOL)
− 421-pin 31mmx31mm BGA Package
PC card controller (PCI7411, Texas Instrument-made)
− PCI Interface (PCI Rev. 2.3)
− PC Card Controller
− IEEE1394 Controller
− Flash Media Controller
− SD Host Controller
Super I/O (SMSC-made LPC47N217)
• Two serial ports (NS16C550 compatible)
(1 port is used as Debug port)
QOSMIO G10 Maintenance Manual (960-497)
1.2 System Block Diagram
1-7