Open Drain Output Configuration; Quasi-Bidirectional Output; Open Drain Output - Philips P89LPC902 User Manual

8-bit microcontrollers with accelerated two-clock 80c51 core 1kb 3v low-power byte-eraseable flash with 128 byte ram
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Philips Semiconductors
I/O PORTS
The third pullup is referred to as the "strong" pullup. This pullup is used to speed up low-to-high transitions on a quasi-bidirectional
port pin when the port latch changes from a logic 0 to a logic 1. When this occurs, the strong pullup turns on for two CPU clocks
quickly pulling the port pin high .
The quasi-bidirectional port configuration is shown in Figure 4-1.
Although the P89LPC901/902/903 is a 3V device the pins are 5V-tolerant (except for XTAL1 and XTAL2). If 5V is applied to a
pin configured in quasi-bidirectional mode, there will be a current flowing from the pin to V
Therefore, applying 5V to pins configured in quasi-bidirectional mode is discouraged.
A quasi-bidirectional port pin has a Schmitt-triggered input that also has a glitch suppression circuit. (Please refer to the
P89LPC901/902/903 datasheet, AC Characteristics for glitch filter specifications)
port latch data

Open Drain Output Configuration

The open drain output configuration turns off all pullups and only drives the pulldown transistor of the port pin when the port latch
contains a logic 0. To be used as a logic output, a port configured in this manner must have an external pullup, typically a resistor
tied to V
. The pulldown for this mode is the same as for the quasi-bidirectional mode.
DD
The open drain port configuration is shown in Figure 4-2.
An open drain port pin has a Schmitt-triggered input that also has a glitch suppression circuit .(Please refer to the P89LPC901/
902/903 datasheet, AC Characteristics for glitch filter specifications).
port latch data
2003 Dec 8
2 CPU
clock delay
input data
Figure 4-1: Quasi-Bidirectional Output
input data
Figure 4-2: Open Drain Output
DD
V
V
DD
strong
glitch rejection
40
User's Manual - Preliminary -
P89LPC901/902/903
causing extra power consumption.
V
DD
DD
very
weak
weak
port
pin
glitch rejection
port
pin

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