Philips P89LPC906 User Manual
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Philips P89LPC906 User Manual

Philips P89LPC906 User Manual

8-bit microcontrollers with accelerated two-clock 80c51 core 1kb 3v low-power byte-eraseable flash with 128 byte ram
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USER
MANUAL
P89LPC906/907/908
8-bit microcontrollers with accelerated two-clock 80C51 core
1KB 3V Low-Power byte-eraseable Flash with 128 Byte RAM
Philips
Semiconductors
INTEGRATED CIRCUITS
2003 Dec 8
PHILIPS

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Summary of Contents for Philips P89LPC906

  • Page 1 USER MANUAL P89LPC906/907/908 8-bit microcontrollers with accelerated two-clock 80C51 core 1KB 3V Low-Power byte-eraseable Flash with 128 Byte RAM Philips Semiconductors INTEGRATED CIRCUITS 2003 Dec 8 PHILIPS...

  • Page 2: Table Of Contents

    Clock Definitions ... 25 CPU Clock (OSCCLK) ... 25 Low Speed Oscillator Option - P89LPC906... 25 Medium Speed Oscillator Option - P89LPC906 ... 25 High Speed Oscillator Option - P89LPC906... 25 Oscillator Option Selection- P89LPC906... 26 Clock Output - P89LPC906 ... 26 On-Chip RC oscillator Option ...
  • Page 3 Philips Semiconductors Table of Contents 6. Real-Time Clock/System Timer... 47 Real-time Clock Source ... 47 Changing RTCS1-0 ... 50 Real-time Clock Interrupt/Wake Up ... 50 Reset Sources Affecting the Real-time Clock... 50 7. Power Monitoring Functions ... 53 Brownout Detection ... 53 Power-On Detection ...
  • Page 4 Philips Semiconductors Table of Contents Power down operation ... 84 Watchdog Clock Source ... 84 Periodic wakeup from Power down without an external oscillator ... 85 13. Additional Features... 87 Software Reset ... 87 Dual Data Pointers... 87 14. Flash program memory ... 89 General description...
  • Page 5 Special function registers table - P89LPC906........15...
  • Page 6 Watchdog Timer Control Register ......... . . 81 P89LPC906/907/908 Watchdog Timeout Values ....... 82 Watchdog Timer in Watchdog Mode (WDTE = 1).

  • Page 7: General Description

    The P89LPC906/907/908 is a single-chip microcontroller designed for applications demanding high-integration, low cost solutions over a wide range of performance requirements. The P89LPC906/907/908 is based on a high performance processor architecture that executes instructions six times the rate of standard 80C51 devices. Many system level functions have been incorporated into the P89LPC906/907/908 in order to reduce component count, board space, and system cost.

  • Page 8: Product Comparison

    Philips Semiconductors GENERAL DESCRIPTION Logic Symbols KBI4 CIN1A KBI5 CMPREF KBI6 CMP1 CLKOUT XTAL2 XTAL1 KBI4 CIN1A KBI5 CMPREF KBI6 CMP1 KBI4 CIN1A KBI5 CMPREF KBI6 CMP1 PRODUCT COMPARISON The following table highlights differences between these three devices. Part number Ext crystal pins CLKOUT output T0 PWM output...
  • Page 9 Philips Semiconductors GENERAL DESCRIPTION Block Diagram - P89LPC906 1 KB Code Flash 128 byte Data RAM Port 3 Configurable I/Os Port 1 Input Port 0 Configurable I/Os Keypad Interrupt Watchdog Timer and Oscillator Programmable Oscillator Divider Configurable Crystal or Oscillator...
  • Page 10 Philips Semiconductors GENERAL DESCRIPTION Block Diagram - P89LPC907 1 KB Code Flash 128 byte Data RAM Port 1 Configurable I/O Port 0 Configurable I/Os Keypad Interrupt Watchdog Timer and Oscillator Programmable Oscillator Divider On-Chip Oscillator 2003 Dec 8 High Performance...
  • Page 11 Philips Semiconductors GENERAL DESCRIPTION Block Diagram - P89LPC908 1 KB Code Flash 128 byte Data RAM Port 1 Configurable I/Os Port 0 Configurable I/Os Keypad Interrupt Watchdog Timer and Oscillator Programmable Oscillator Divider On-Chip Oscillator 2003 Dec 8 High Performance...

  • Page 12: Pin Descriptions - P89Lpc906

    Philips Semiconductors GENERAL DESCRIPTION PIN DESCRIPTIONS - P89LPC906 Mnemonic Pin no. Type Name and function P0.4 - P0.6 3, 7,8 P1.5 P3.0 - P3.1 2003 Dec 8 Port 0: Port 0 is an I/O port with a user-configurable output types. During reset Port 0 latches are configured in the input only mode with the internal pullup disabled.

  • Page 13: Pin Descriptions - P89Lpc907

    Philips Semiconductors GENERAL DESCRIPTION PIN DESCRIPTIONS - P89LPC907 Mnemonic Pin no. Type Name and function P0.4 - P0.6 3, 7,8 P1.0-P1.5 1,4,5 2003 Dec 8 Port 0: Port 0 is an I/O port with a user-configurable output types. During reset Port 0 latches are configured in the input only mode with the internal pullup disabled.

  • Page 14: Pin Descriptions - P89Lpc908

    Philips Semiconductors GENERAL DESCRIPTION PIN DESCRIPTIONS - P89LPC908 Mnemonic Pin no. Type Name and function P0.4 - P0.6 3, 7,8 P1.0 - P1.5 1,4,5 2003 Dec 8 Port 0: Port 0 is an I/O port with a user-configurable output types. During reset Port 0 latches are configured in the input only mode with the internal pullup disabled.

  • Page 15: Special Function Registers

    It is a reserved bit and may be used in future derivatives. - ’0’ MUST be written with ’0’, and will return a ’0’ when read. - ’1’ MUST be written with ’1’, and will return a ’1’ when read. Table 1: Special function registers table - P89LPC906 Name Description...
  • Page 16 Philips Semiconductors GENERAL DESCRIPTION Name Description IP1H# Interrupt Priority 1 High KBCON# Keypad Control Register KBMASK# Keypad Interrupt Mask Register KBPATN# Keypad Pattern Register Port 0 Port 1 Port 3 P0M1# Port 0 Output Mode 1 P0M2# Port 0 Output Mode 2...
  • Page 17 Philips Semiconductors GENERAL DESCRIPTION Name Description Timer 0 High Timer 1 High Timer 0 Low Timer 1 Low TMOD Timer 0 and 1 Mode TRIM# Internal Oscillator Trim Register WDCON# Watchdog Control Register WDL# Watchdog Load WFEED1# Watchdog Feed 1...

  • Page 18: Special Function Registers Table - P89Lpc907

    Philips Semiconductors GENERAL DESCRIPTION Table 2: Special function registers table - P89LPC907 Name Description ACC* Accumulator AUXR1# Auxiliary Function Register B Register BRGR0#§ Baud Rate Generator Rate Low BRGR1#§ Baud Rate Generator Rate High BRGCON# Baud Rate Generator Control CMP1#...
  • Page 19 Philips Semiconductors GENERAL DESCRIPTION Name Description KBMASK# Keypad Interrupt Mask Register KBPATN# Keypad Pattern Register Port 0 Port 1 P0M1# Port 0 Output Mode 1 P0M2# Port 0 Output Mode 2 P1M1# Port 1 Output Mode 1 P1M2# Port 1 Output Mode 2...
  • Page 20 Philips Semiconductors GENERAL DESCRIPTION Name Description Timer 0 High Timer 1 High Timer 0 Low Timer 1 Low TMOD Timer 0 and 1 Mode TRIM# Internal Oscillator Trim Register WDCON# Watchdog Control Register WDL# Watchdog Load WFEED1# Watchdog Feed 1...

  • Page 21: Special Function Registers Table - P89Lpc908

    Philips Semiconductors GENERAL DESCRIPTION Table 3: Special function registers table - P89LPC908 Name Description ACC* Accumulator AUXR1# Auxiliary Function Register B Register BRGR0#§ Baud Rate Generator Rate Low BRGR1#§ Baud Rate Generator Rate High BRGCON# Baud Rate Generator Control CMP1#...
  • Page 22 Philips Semiconductors GENERAL DESCRIPTION Name Description KBMASK# Keypad Interrupt Mask Register KBPATN# Keypad Pattern Register Port 0 Port 1 P0M1# Port 0 Output Mode 1 P0M2# Port 0 Output Mode 2 P1M1# Port 1 Output Mode 1 P1M2# Port 1 Output Mode 2...
  • Page 23 Philips Semiconductors GENERAL DESCRIPTION Name Description Timer 0 Low Timer 1 Low TMOD Timer 0 and 1 Mode TRIM# Internal Oscillator Trim Register WDCON# Watchdog Control Register WDL# Watchdog Load WFEED1# Watchdog Feed 1 WFEED2# Watchdog Feed 2 Notes: * SFRs are bit addressable.

  • Page 24: Memory Organization

    Philips Semiconductors GENERAL DESCRIPTION MEMORY ORGANIZATION The P89LPC906/907/908 memory map is shown in Figure 1-1. 03FFh 0300h 02FFh 0200h 01FFh 0100h 00FFh 0000h 1 KB Flash Code Memory Space The various P89LPC906/907/908 memory spaces are as follows: DATA 128 bytes of internal data memory space (00h..7Fh) accessed via direct or indirect addressing, using instructions other than MOVX and MOVC.

  • Page 25: Clocks

    2. CLOCKS ENHANCED CPU The P89LPC906/907/908 uses an enhanced 80C51 CPU which runs at 6 times the speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most instructions execute in one or two machine cycles.

  • Page 26: Oscillator Option Selection- P89Lpc906

    ON-CHIP RC OSCILLATOR OPTION The P89LPC906/907/908 has a 6-bit field within the TRIM register that can be used to tune the frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory pre-programmed value to adjust the oscillator frequency to 7.373 MHz, ±1%.

  • Page 27: External Clock Input Option - P89Lpc906

    The P89LPC906/907/908 has an internal wakeup timer that delays the clock until it stabilizes depending to the clock source used. If the clock source is any of the three crystal selections (P89LPC906), the delay is 992 OSCCLK cycles plus 60-100µs. If the clock source is either the internal RC oscillator or the Watchdog oscillator, the delay is 224 OSCCLK cycles plus 60-100µs.

  • Page 28: Low Power Select (P89Lpc906)

    LOW POWER SELECT (P89LPC906) The P89LPC906 is designed to run at 12MHz (CCLK) maximum. However, if CCLK is 8MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to a ’1’ to lower the power consumption further. On any reset, CLKLP is ’0’ allowing highest performance.

  • Page 29: Block Diagram Of Oscillator Control- P89Lpc907,P89Lpc908

    Philips Semiconductors User’s Manual - Preliminary - CLOCKS P89LPC906/907/908 R T C S 1 :0 R T C C P U C lo ck F O S C 2 :0 O S C C C L K C L K...
  • Page 30 Philips Semiconductors User’s Manual - Preliminary - CLOCKS P89LPC906/907/908 2003 Dec 8...

  • Page 31: Interrupts

    INTERRUPTS 3. INTERRUPTS The P89LPC906/907/908 use a four priority level interrupt structure. This allows great flexibility in controlling the handling of the many interrupt sources. The P89LPC906 supports 6 interrupt sources: timers 0 and 1, brownout detect, watchdog/ realtime clock, keyboard, and the comparator. The P89LPC907 supports 7 interrupt sources: timers 0 and 1, serial port Tx, brownout detect, watchdog/ realtime clock, keyboard, and comparators 1 and 2.

  • Page 32: External Interrupt Inputs

    EXTERNAL INTERRUPT INPUTS The P89LPC906/907/908 have a Keypad Interrupt function (see Keypad Interrupt (KBI) on page 77). This can be used as an external interrupt input. If enabled when the P89LPC906/907/908 is put into Power down or Idle mode, the keypad interrupt will cause the processor to wake up and resume operation.

  • Page 33: Interrupt Sources, Enables, And Power Down Wake-Up Sources - P89Lpc906

    Philips Semiconductors INTERRUPTS BOPD RTCF KBIF ERTC EKBI (RTCCON.1) WDOVF EWDRT EA (IE0.7) Figure 3-1: Interrupt sources, enables, and Power down Wake-up sources - P89LPC906 BOPD RTCF KBIF ERTC EKBI (RTCCON.1) WDOVF EWDRT EA (IE0.7) TI & RI/RI ES/ESR Figure 3-2: Interrupts sources, enables, and Power down Wake-up sources - P89LPC907,P89LPC908 2003 Dec 8 User’s Manual - Preliminary -...
  • Page 34 Philips Semiconductors User’s Manual - Preliminary - INTERRUPTS P89LPC906/907/908 2003 Dec 8...

  • Page 35: I/O Ports

    PORT CONFIGURATIONS All but one I/O port pin on the P89LPC906/907/908 may be configured by software to one of four types on a pin-by-pin basis, as shown in Table 4-2. These are: quasi-bidirectional (standard 80C51 port outputs), push-pull, open drain, and input-only. Two configuration registers for each port select the output type for each port pin.

  • Page 36: Open Drain Output Configuration

    The quasi-bidirectional port configuration is shown in Figure 4-1. Although the P89LPC906/907/908 is a 3V device the pins are 5V-tolerant (except for XTAL1 and XTAL2). If 5V is applied to a pin configured in quasi-bidirectional mode, there will be a current flowing from the pin to V Therefore, applying 5V to pins configured in quasi-bidirectional mode is discouraged.

  • Page 37: Input-Only Configuration

    The push-pull port configuration is shown in Figure 4-4. A push-pull port pin has a Schmitt-triggered input that also has a glitch suppression circuit (please refer to the P89LPC906/907/ 908 datasheet, AC Characteristics for glitch filter specifications)

  • Page 38: Port Output Configuration - P89Lpc906

    • Pin P1.5 is input only. • Every output on the P89LPC906/907/908 has been designed to sink typical LED drive current. However, there is a maximum total output current for all ports which must not be exceeded. Please refer to the P89LPC906/907/908 datasheet for detailed specifications.
  • Page 39 Philips Semiconductors User’s Manual - Preliminary - I/O PORTS P89LPC906/907/908 All ports pins that can function as an output have slew rate controlled outputs to limit noise generated by quickly switching output signals. The slew rate is factory-set to approximately 10 ns rise and fall times.
  • Page 40 Philips Semiconductors User’s Manual - Preliminary - I/O PORTS P89LPC906/907/908 2003 Dec 8...

  • Page 41: Timers 0 And 1

    The “Timer” or “Counter” function is selected by control bit T0C/T in the Special Function Register TMOD. Timer 0 and Timer 1 of the P89LPC906 and P89LPC908, and Timer 1 of the P89LPC907 have four operating modes (modes 0, 1, 2, and 3), which are selected by bit-pairs (TnM1, TnM0) in TMOD.

  • Page 42: Mode 0

    Philips Semiconductors TIMERS 0 AND 1 TAMOD - P89LPC907 Address: 8Fh Not bit addressable Reset Source(s): Any reset Reset Value: xxx0xxx0B SYMBOL FUNCTION TAMOD.7-1 Reserved for future use. Should not be set to 1 by user programs. TAMOD.0 T0M2 Mode Select bit 2 for Timer 0. Used with T0M1 and T0M0 in the TMOD register to determine Timer 0 mode (P89LPC907).

  • Page 43: Mode 3

    Philips Semiconductors TIMERS 0 AND 1 MODE 3 When Timer 1 is in Mode 3 it is stopped. The effect is the same as setting TR1 = 0. Timer 0 in Mode 3 establishes TL0 and TH0 as two separate 8-bit counters. The logic for Mode 3 on Timer 0 is shown in Figure 5-7.

  • Page 44: Timer/Counter 0 Or 1 In Mode 0 (13-Bit Counter)

    Philips Semiconductors TIMERS 0 AND 1 PCLK T0 Pin* * T0 Pin functions available on P89LPC907 Figure 5-4: Timer/Counter 0 or 1 in Mode 0 (13-bit counter) PCLK T0 Pin* * T0 Pin functions available on P89LPC907 Figure 5-5: Timer/Counter 0 or 1 in Mode 1 (16-bit counter)

  • Page 45: Timer Overflow Toggle Output - P89Lpc907

    Philips Semiconductors TIMERS 0 AND 1 PCLK T0 Pin* PCLK Figure 5-7: Timer/Counter 0 Mode 3 (two 8-bit counters) PCLK Figure 5-8: Timer/Counter 0 in Mode 6 (PWM auto-reload), P89LPC907. TIMER OVERFLOW TOGGLE OUTPUT - P89LPC907 Timer 0 can be configured to automatically toggle the T0 pin whenever the timer overflow occurs. This function is enabled by control bit ENT0 in the AUXR1 register.
  • Page 46 Philips Semiconductors User’s Manual - Preliminary - TIMERS 0 AND 1 P89LPC906/907/908 2003 Dec 8...

  • Page 47: Real-Time Clock/System Timer

    REAL-TIME CLOCK SOURCE On the P89LPC906 the clock source for this counter can be either CCLK or the XTAL1-2 oscillator (XCLK) . On the P89LPC907 and P89LPC908 devicesthe clock source for this counter is CCLK. Please refer to Figure 2-3 "Block Diagram of Oscillator Control - P89LPC906"...

  • Page 48: Real-Time Clock/System Timer Block Diagram

    23-bit down counter W ake up from Power-down Interrupt ERTC if enabled (shared w. W DT) Figure 6-1: Real-time clock/system timer Block Diagram Table 6-1: Real-time Clock/System Timer Clock Source - P89LPC906 FOSC2 FOSC1 FOSC0 (UCFG1.2) (UCFG1.1) (UCFG1.0) 2003 Dec 8...

  • Page 49: Real-Time Clock/System Timer Clock Source - P89Lpc907,P89Lpc908

    Philips Semiconductors REAL-TIME CLOCK/SYSTEM TIMER FOSC2 FOSC1 FOSC0 (UCFG1.2) (UCFG1.1) (UCFG1.0) Table 6-2: Real-time Clock/System Timer Clock Source - P89LPC907,P89LPC908 FOSC2 FOSC1 FOSC0 (UCFG1.2) (UCFG1.1) (UCFG1.0) 2003 Dec 8 RTCS1:0 CCLK Frequency RC Oscillator/DIVM WDT Oscillator/DIVM external clock/DIVM RTCS1:0 CCLK Frequency RC Oscillator/DIVM User’s Manual - Preliminary -...

  • Page 50: Changing Rtcs1-0

    Philips Semiconductors REAL-TIME CLOCK/SYSTEM TIMER FOSC2 FOSC1 FOSC0 (UCFG1.2) (UCFG1.1) (UCFG1.0) CHANGING RTCS1-0 RTCS1-0 cannot be changed if the RTC is currently enabled (RTCCON.0 =1). Setting RTCEN and updating RTCS1-0 may be done in a single write to RTCCON. However, if RTCEN = 1, this bit must first be cleared before updating RTCS1-0 REAL-TIME CLOCK INTERRUPT/WAKE UP If ERTC (RTCCON.1), EWDRT (IEN0.6) and EA (IEN0.7) are set to ’1’, RTCF can be used as an interrupt source.

  • Page 51: Rtccon Register

    Philips Semiconductors REAL-TIME CLOCK/SYSTEM TIMER RTCCON Address: D1h Not bit addressable Reset Source(s): Power-up only Reset Value: 011xxx00B SYMBOL FUNCTION RTCCON.7 RTCF Real-time Clock Flag. This bit is set to ’1’ when the 23-bit Real-time clock reaches a count of ’0’. It can be cleared in software.
  • Page 52 Philips Semiconductors User’s Manual - Preliminary - REAL-TIME CLOCK/SYSTEM TIMER P89LPC906/907/908 2003 Dec 8...

  • Page 53: Power Monitoring Functions

    POWER MONITORING FUNCTIONS P89LPC906/907/908 7. POWER MONITORING FUNCTIONS The P89LPC906/907/908 incorporates power monitoring functions designed to prevent incorrect operation during initial power- on and power loss or reduction during operation. This is accomplished with two hardware functions: Power-on Detect and Brownout Detect.

  • Page 54: Power-On Detection

    (UCFG1.5) is programmed, BOF (RSTSRC.5) will be set when POF is set. If BOE is unprogrammed, BOF is meaningless. POWER REDUCTION MODES The P89LPC906/907/908 supports three different power reduction modes as determined by SFR bits PCON.1-0 (see Table ): 2003 Dec 8 (PCON.4)

  • Page 55: Power Reduction Modes

    The Power down mode stops the oscillator in order to minimize power consumption. The P89LPC906/907/908 exits Power down mode via any reset, or certain interrupts - brownout Interrupt, keyboard, Real-time clock (system timer), watchdog, and comparator trips. Waking up by reset is only enabled if the corresponding reset is enabled, and waking up by interrupt is only enabled if the corresponding interrupt is enabled and the EA SFR bit (IEN0.7) is set.

  • Page 56: Power Control Register (Pcon)

    Philips Semiconductors POWER MONITORING FUNCTIONS PCON Address: 87h Not bit addressable Reset Source(s): Any reset Reset Value: 00000000B SYMBOL FUNCTION PCON.7 SMOD1 Double Baud Rate bit for the serial port (UART) when Timer 1 is used as the baud rate source.

  • Page 57: Power Control Register (Pcona)

    Philips Semiconductors POWER MONITORING FUNCTIONS PCONA Address: B5H Not bit addressable Reset Source(s): Any reset Reset Value: 00000000B SYMBOL FUNCTION PCONA.7 RTCPD Real-time Clock Power down: When ’1’, the internal clock to the Real-time Clock is disabled. PCONA.6 Not used. Reserved for future use.
  • Page 58 Philips Semiconductors User’s Manual - Preliminary - POWER MONITORING FUNCTIONS P89LPC906/907/908 2003 Dec 8...

  • Page 59: Uart (P89Lpc907, P89Lpc908)

    Philips Semiconductors User’s Manual - Preliminary - UART P89LPC906/907/908 8. UART (P89LPC907, P89LPC908) The P89LPC907 and P89LPC908 devices have an enhanced UART that is compatible with the conventional 80C51 UART, except that Timer 2 overflow cannot be used as a baud rate source. The UART does include an independent Baud Rate Generator.

  • Page 60: Sfr Space

    Philips Semiconductors UART SFR SPACE The UART SFRs are at the following locations: Table 8-1: SFR Locations for UARTs Register Description PCON Power Control SCON Serial Port (UART) Control SBUF Serial Port (UART) Data Buffer SADDR Serial Port (UART) Address...

  • Page 61: Framing Error

    Philips Semiconductors UART BRGCON Address: BDh Not bit addressable Reset Source(s): Any reset Reset Value: xxxxxx00B SYMBOL FUNCTION BRGCON.7-2 Reserved for future use. Should not be set to 1 by user programs. BRGCON.1 SBRGS Select Baud Rate Generator as the source for baud rates to UART in modes 1 & 3 (see Table for details) BRGCON.0...

  • Page 62: Serial Port Control Register (Scon)

    Philips Semiconductors UART SCON Address: 98h Bit addressable Reset Source(s): Any reset Reset Value: 00000000B SYMBOL FUNCTION SCON.7 SM0/FE The use of this bit is determined by SMOD0 in the PCON register. If SMOD0 = 0, this bit is read and written as SM0, which with SM1, defines the serial port mode. If SMOD0 = 1, this bit is read and written as FE (Framing Error).

  • Page 63: More About Uart Mode 0

    Philips Semiconductors UART SSTAT Address: BAh Not bit addressable Reset Source(s): Any reset Reset Value: 00000000B SYMBOL FUNCTION SSTAT.7 DBMOD Double buffering mode. When set = 1 enables double buffering. Must be ’0’ for UART mode 0. In order to be compatible with existing 80C51 devices, this bit is reset to ’0’ to disable double buffering.

  • Page 64: More About Uart Mode 1

    Philips Semiconductors UART S1...S16 S1...S16 S1...S16 S1...S16 Write to SBUF Shift RxD (Data Out) TxD (Shift Clock) Write to SCON (Clear RI) Shift (Data In) TxD (Shift Clock) Figure 8-5: Serial Port Mode 0 (Double Buffering Must Be Disabled) MORE ABOUT UART MODE 1 Reception is initiated by detecting a 1-to-0 transition on RxD.

  • Page 65: More About Uart Modes 2 And 3

    Philips Semiconductors UART MORE ABOUT UART MODES 2 AND 3 Reception is the same as in Mode 1. The signal to load SBUF and RB8, and to set RI, will be generated if, and only if, the following conditions are met at the time the final shift pulse is generated.

  • Page 66: Double Buffering

    Philips Semiconductors UART DOUBLE BUFFERING The UART has a transmit double buffer that allows buffering of the next character to be written to SBUF while the first character is being transmitted. Double buffering allows transmission of a string of characters with only one stop bit between any two characters, provided the next character is written between the start bit and the stop bit of the previous character.

  • Page 67: The 9Th Bit (Bit 8) In Double Buffering (Modes 1, 2 And 3)

    Philips Semiconductors UART Write to SBUF Tx Interrupt Single Buffering (DBMOD/SSTAT.7 = 0), Early Interrupt (INTLO/SSTAT.6 = 0) is Shown Write to SBUF Tx Interrupt Double Buffering (DBMOD/SSTAT.7 = 1), Early Interrupt (INTLO/SSTAT.6 = 0) is Shown, No End- Write to...

  • Page 68: Multiprocessor Communications

    Philips Semiconductors UART - If DBISEL is ’1’ and INTLO is ’1’, a Tx interrupt will occur at the end of the STOP bit of the data currently in the shifter (which is also the last data). 7. If there is more data, the CPU writes to TB8 again.
  • Page 69 Philips Semiconductors UART since slave 1 requires a 0 in bit 1. A unique address for slave 1 would be 1100 0001 since a 1 in bit 0 will exclude slave 0. Both slaves can be selected at the same time by an address which has bit 0 = 0 (for slave 0) and bit 1 = 0 (for slave 1). Thus, both could be addressed with 1100 0000.
  • Page 70 Philips Semiconductors User’s Manual - Preliminary - UART P89LPC906/907/908 2003 Dec 8...

  • Page 71: Reset

    POWER-ON RESET CODE EXECUTION The P89LPC906/907/908 contains two special Flash elements: the BOOT VECTOR and the Boot Status Bit. Following reset, the device examines the contents of the Boot Status Bit. If the Boot Status Bit is set to zero, power-up execution starts at loca- tion 0000H, which is the normal start address of the user’s application code.

  • Page 72: Reset Sources Register

    Philips Semiconductors RESET RSTSRC Address: DFH Not bit addressable Reset Sources: Power-on only Reset Value: xx110000B (This is the power-on reset value. Other reset sources will set corresponding bits.) SYMBOL FUNCTION RSTSRC.7-6 Reserved for future use. Should not be set to 1 by user programs.

  • Page 73: Analog Comparators

    10. ANALOG COMPARATORS An analog comparator is provided on the P89LPC906/907/908 . Comparator operation is such that the output is a logical one when the positive input is greater than the negative input (selectable from a pin or an internal reference voltage). Otherwise the output is a zero.

  • Page 74: Internal Reference Voltage

    Philips Semiconductors ANALOG COMPARATORS (P0.4) CIN1A (P0.5) CMPREF Vref Figure 10-2: Comparator Input and Output Connections CN1, OE1 = 0 0 CIN1A CMPREF CN1, OE1 = 1 0 CIN1A Vref (1.23V) INTERNAL REFERENCE VOLTAGE An internal reference voltage, Vref, may supply a default reference when a single comparator input pin is used. Please refer to the Datasheet for specifications.

  • Page 75: Comparator Configuration Example

    Philips Semiconductors ANALOG COMPARATORS If the comparator output to a pin is enabled, the pin should be configured in the push-pull mode in order to obtain fast switching times while in power down mode. The reason is that with the oscillator stopped, the temporary strong pullup that normally occurs during switching on a quasi-bidirectional port pin does not take place.
  • Page 76 Philips Semiconductors User’s Manual - Preliminary - ANALOG COMPARATORS P89LPC906/907/908 2003 Dec 8...

  • Page 77: Keypad Interrupt (Kbi)

    Philips Semiconductors KEYPAD INTERRUPT (KBI) 11. KEYPAD INTERRUPT (KBI) The Keypad Interrupt function is intended primarily to allow a single interrupt to be generated when the Port 0 bits are equal to or not equal to a certain pattern. This function can be used for keypad recognition. The user can configure the port via SFRs for different tasks.

  • Page 78: Keypad Interrupt Mask Register (Kbm)

    Philips Semiconductors KEYPAD INTERRUPT (KBI) KBMASK Address: 86h Not bit addressable Reset Source(s): Any reset Reset Value: 00000000B SYMBOL KBMASK.7 KBMASK.6 KBMASK.5 KBMASK.4 KBMASK.3:0 Note: the Keypad Interrupt must be enabled in order for the settings of the KBMASK register to be effective.

  • Page 79: 12. Watchdog Timer

    Philips Semiconductors WATCHDOG TIMER 12. WATCHDOG TIMER The watchdog timer subsystem protects the system from incorrect code execution by causing a system reset when it underflows as a result of a failure of software to feed the timer prior to the timer reaching its terminal count. The watchdog timer can only be reset by a power-on reset.

  • Page 80: Feed Sequence

    SETB This sequence assumes that the P89LPC906/907/908 interrupt system is enabled and there is a possibility of an interrupt request occuring during the feed sequence. If an interrupt was allowed to be serviced and the service routine contained any SFR writes, it would trigger a watchdog reset.

  • Page 81: Watchdog Timer Control Register

    )(0+1)+1 = 33 The maximum number of tclks is: (5+7) tclks = (2 )(255+1)+1 = 1,048,577 The following table shows sample P89LPC906/907/908 timeout values. 2003 Dec 8 ; do watchdog feed part 1 ; do watchdog feed part 2 ; enable interrupt...

  • Page 82: P89Lpc906/907/908 Watchdog Timeout Values

    Philips Semiconductors WATCHDOG TIMER Table 12-2: P89LPC906/907/908 Watchdog Timeout Values PRE2-PRE0 WDL in decimal) 2003 Dec 8 Timeout Period (in watchdog clock 400KHz Watchdog Oscillator Clock cycles) (Nominal) 82.5µs 8,193 20.5ms 162.5µs 16,385 41.0ms 322.5µs 32,769 81.9ms 642.5µs 65,537 163.8ms .1.28ms...

  • Page 83: Watchdog Timer In Timer Mode

    Philips Semiconductors WATCHDOG TIMER MOV WFEED1, #0A5H MOV WFEED2, #05AH Watchdog Oscillator PRESCALER ÷32 PCLK PRE2 Figure 12-3: Watchdog Timer in Watchdog Mode (WDTE = 1) WATCHDOG TIMER IN TIMER MODE Figure 12-4 shows the Watchdog Timer in Timer Mode. In this mode, any changes to WDCON are written to the shadow register after one watchdog clock cycle.

  • Page 84: Power Down Operation

    Philips Semiconductors WATCHDOG TIMER MOV WFEED1, #0A5H MOV WFEED2, #05AH Watchdog Oscillator PRESCALER ÷32 PRE2 Figure 12-4: Watchdog Timer in Timer Mode (WDTE = 0) POWER DOWN OPERATION The WDT oscillator will continue to run in power down, consuming approximately 50uA, as long as the WDT oscillator is selected as the clock source for the WDT.

  • Page 85: Periodic Wakeup From Power Down Without An External Oscillator

    Philips Semiconductors User’s Manual - Preliminary - WATCHDOG TIMER P89LPC906/907/908 PERIODIC WAKEUP FROM POWER DOWN WITHOUT AN EXTERNAL OSCILLATOR Without using an external oscillator source, the power consumption required in order to have a periodic wakeup is determined by the power consumption of the internal oscillator source used to produce the wakeup.The Real-time clock running from the internal RC oscillator can be used.
  • Page 86 Philips Semiconductors User’s Manual - Preliminary - WATCHDOG TIMER P89LPC906/907/908 2003 Dec 8...

  • Page 87: Additional Features

    AUXR1.4 Reserved AUXR1.3 SRST Software Reset. When set by software, resets the P89LPC906/907/908 as if a hardware reset occurred. AUXR1.2 This bit contains a hard-wired 0. Allows toggling of the DPS bit by incrementing AUXR1, without interfering with other bits in the register.
  • Page 88 Also, any instruction that reads or manipulates the DPH and DPL registers (the upper and lower bytes of the current DPTR) will be affected by the setting of DPS. The MOVX instructions have limited application for the P89LPC906/907/908 since the part does not have an external data bus.

  • Page 89: 14. Flash Program Memory

    14. FLASH PROGRAM MEMORY GENERAL DESCRIPTION The P89LPC906/907/908 Flash memory provides in-circuit electrical erasure and programming. The Flash can be read and written as bytes. On-chip erase and write timing generation contribute to a user-friendly programming interface. The cell is designed to optimize the erase and programming mechanisms.
  • Page 90 Philips Semiconductors FLASH PROGRAM MEMORY "wrap -around" to the first byte in the page register, but will not affect FMADRL[7:4]. Bytes loaded into the page register do not have to be continuous. Any byte location can be loaded into the page register by changing the contents of FMADRL prior to writ- ing to FMDATA.

  • Page 91: Flash Memory Control Register

    Philips Semiconductors FLASH PROGRAM MEMORY FMCON Address: E4h Not bit addressable Reset Source(s): Any reset Reset Value: SYMBOL FMCON.7-4 FMCON.3 FMCON.2 FMCON.1 FMCON.0 ;* Inputs: R3 = number of bytes to program (byte) R4 = page address MSB(byte) R5 = page address LSB(byte) R7 = pointer to data buffer in RAM(byte) ;* Outputs:...

  • Page 92: Accessing Additional Flash Elements

    Philips Semiconductors FLASH PROGRAM MEMORY Figure 14-2: Assembly language routine to erase/program all or part of a page unsigned char idata dbytes[16]; unsigned char Fm_stat; bit PGM_USER (unsigned char, unsigned char); bit prog_fail; void main () prog_fail=PGM_USER(0x1F,0xC0); bit PGM_USER (unsigned char page_hi, unsigned char page_lo)

  • Page 93: Erase-Programming Additional Flash Elements

    Philips Semiconductors FLASH PROGRAM MEMORY Table 14-1: Flash elements accesable through IAP-Lite Element Address Description UCFG1 User Configuration byte 1. Boot Vector Boot vector Status Bit Status bit byte Security Security byte, sector 0 byte 0 Security Security byte, sector 1...

  • Page 94: Assembly Language Routine To Erase/Program A Flash Element

    Philips Semiconductors FLASH PROGRAM MEMORY ;* Inputs: R5 = data to write(byte) R7 = element address(byte) ;* Outputs: None CONF WR_ELEM: FMADRL,R7 FMCON,#CONF FMDAT,R5 R7,FMCON A,R7 A,#0FH BAD: SETB Figure 14-4: Assembly language routine to erase/program a flash element unsigned char Fm_stat;...

  • Page 95: C-Language Routine To Read A Flash Element

    Philips Semiconductors FLASH PROGRAM MEMORY #include <REG921.H> unsigned char READ_EL (unsigned char); unsigned char GET_EL; void main () GET_EL = READ_EL(0x02); unsigned char READ_EL (unsigned char el_addr) #define CONF unsigned char el_data; FMADRL = el_addr; FMCON = CONF; el_data = FMDATA;...

  • Page 96: User Configuration Bytes

    USER CONFIGURATION BYTES A number of user-configurable features of the P89LPC906/907/908 must be defined at power-up and therefore cannot be set by the program after start of execution. These features are configured through the use of Flash byte UCFG1 shown in Figure 14-7.

  • Page 97: User Security Bytes

    Philips Semiconductors FLASH PROGRAM MEMORY USER SECURITY BYTES There are four User Sector Security Bytes (SEC0, ..., SEC3), each corresponding to one sector and having the following bit assignments: SECx Address: xxxxh Unprogrammed value: 00h SYMBOL FUNCTION SECx.7-3 Reserved (should remain unprogrammed at zero).

  • Page 98: Boot Vector

    Reserved (should remain unprogrammed at zero). BOOTVEC.4-0 Boot Vector. If the Boot Vector is selected as the reset address, the P89LPC906/907/908 will start execution at an address comprised of 00H in the lower eight bits and this BOOTVEC as the upper bits after a reset. (See section "Power-On reset code execution"...

  • Page 99: Instruction Set

    Philips Semiconductors INSTRUCTION SET 15. INSTRUCTION SET Table 15-1: Instruction set summary Mnemonic ADD A,Rn ADD A,dir ADD A,@Ri ADD A,#data ADDC A,Rn ADDC A,dir ADDC A,@Ri ADDC A,#data SUBB A,Rn SUBB A,dir SUBB A,@Ri SUBB A,#data INC A INC Rn...
  • Page 100 Philips Semiconductors INSTRUCTION SET Mnemonic ANL dir,A ANL dir,#data ORL A,Rn ORL A,dir ORL A,@Ri ORL A,#data ORL dir,A ORL dir,#data XRL A,Rn XRL A,dir XRL A, @Ri XRL A,#data XRL dir,A XRL dir,#data CLR A CPL A SWAP A...
  • Page 101 Philips Semiconductors INSTRUCTION SET Mnemonic MOV dir,#data MOV @Ri,A MOV @Ri,dir MOV @Ri,#data MOV DPTR,#data MOVC A,@A+DPTR MOVC A,@A+PC MOVX A,@Ri MOVX A,@DPTR MOVX @Ri,A MOVX @DPTR,A PUSH dir POP dir XCH A,Rn XCH A,dir XCH A,@Ri XCHD A,@Ri Mnemonic...
  • Page 102 Philips Semiconductors INSTRUCTION SET Mnemonic ACALL addr 11 LCALL addr 16 RETI AJMP addr 11 LJMP addr 16 SJMP rel JC rel JNC rel JB bit,rel JNB bit,rel JBC bit,rel JMP @A+DPTR JZ rel JNZ rel CJNE A,dir,rel CJNE A,#d,rel...

  • Page 103: Revision History

    User’s Manual - Preliminary - Philips Semiconductors REVISION HISTORY P89LPC906/907/908 16. REVISION HISTORY 2003 Dec 8 Initial release. 2003 Dec 8...
  • Page 104 User’s Manual - Preliminary - Philips Semiconductors REVISION HISTORY P89LPC906/907/908 2003 Dec 8...

  • Page 105: Index

    Philips Semiconductors INDEX 17. INDEX Analog comparators 37, 73 configuration 73 configuration example 75 enabling 73 internal reference voltage 79 interrupt 74 power reduction modes 74 Analog comparators and power reduction 37 Block diagram 9 BRGCON writing to 23 Brownout detection 53...
  • Page 106 Philips Semiconductors INDEX block fill 7, 25, 31, 35, 41, 47, 53, 59, 71, 73, 77, 79, 87, 89, 99, 103 hardware reset 7, 25, 31, 35, 41, 47, 53, 59, 71, 73, 77, 79, 87, 89, 99, 103 Dual Data Pointers 87...
  • Page 107 Philips Semiconductors INDEX FLASH code 89 organization 24 Oscillator high speed crystal option 25, 26 low speed crystal option 25 medium speed crystal option 25 R-C option 26 watchdog (WDT) option 26 Pin configuration 7 Port 0 12, 13, 14...
  • Page 108 Philips Semiconductors INDEX AUXR1 87 BRGCON 61 CMPn 73 KBCON 77 KBMASK 78 KBPATN 77 PCON 56 PCONA 57 RSTSRC 72 RTCCON 51 SCON 62 SSTAT 63 TAMOD 42 TCON 43 TMOD 41 TRIM 26, 27, 91 UCFG1 96 WDCON 81...
  • Page 109 Philips Semiconductors INDEX double buffering in 9-bit mode 67 double buffering in different modes 66 framing error 61, 65 mode 0 63 mode 0 (shift register) 59 mode 1 64 mode 1 (8-bit variable baud rate) 59 mode 2 65...
  • Page 110 Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

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