Timer Overflow Toggle Output - P89Lpc901; Timer/Counter 0 Mode 3 (Two 8-Bit Counters); Timer/Counter 0 In Mode 6 (Pwm Auto-Reload), P89Lpc901 - Philips P89LPC902 User Manual

Philips Semiconductors
TIMERS 0 AND 1
PCLK
T0 Pin*
TR0
PCLK
TR0
Figure 5-8: Timer/Counter 0 in Mode 6 (PWM auto-reload), P89LPC901.

Timer Overflow toggle output - P89LPC901

Timer 0 can be configured to automatically toggle the T0 pin whenever the timer overflow occurs. This function is enabled by
control bit ENT0 in the AUXR1 register. The port output will be a logic 1 prior to the first timer overflow when this mode is turned
on. In order for this mode to function, the T0C/T bit must be cleared selecting PCLK as the clock source for the timer.
2003 Dec 8
C/T = 0
C/T = 1
PCLK
TR1
Figure 5-7: Timer/Counter 0 Mode 3 (two 8-bit counters)
T0C/T = 0
TL0
(8-bits)
Control
TH0
(8-bits)
Control
* T0 Pin functions available on P89LPC901
TL0
(8-bits)
Control
Reload TH0 on falling transition
and (256-TH0) on rising transition
TH0
(8-bits)
49
User's Manual - Preliminary -
P89LPC901/902/903
Overflow
TF0
Toggle
ENT0
Overflow
TF1
Overflow
TF0
Toggle
ENT0 (AUXR1.4)
Interrupt
T0 Pin*
Interrupt
Interrupt
T0 Pin