Additional Features; Software Reset; Dual Data Pointers; Auxr1 Register - Philips P89LPC902 User Manual

8-bit microcontrollers with accelerated two-clock 80c51 core 1kb 3v low-power byte-eraseable flash with 128 byte ram
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ADDITIONAL FEATURES

13. ADDITIONAL FEATURES
The AUXR1 register contains several special purpose control bits that relate to several chip features. AUXR1 is described in
Figure 13-1.
AUXR1
Address: A2h
Not bit addressable
Reset Source(s): Any reset
Reset Value: 000000x0B
BIT
SYMBOL
AUXR1.7
CLKLP
AUXR1.6
EBRR
AUXR1.5
-
AUXR1.4
-
AUXR1.3
SRST
AUXR1.2
0
AUXR1.1
-
AUXR1.0
DPS

Software Reset

The SRST bit in AUXR1 gives software the opportunity to reset the processor completely, as if an external reset or watchdog
reset had occurred. If a value is written to AUXR1 that contains a 1 at bit position 3, all SFRs will be initialized and execution will
resume at program address 0000. Care should be taken when writing to AUXR1 to avoid accidental software resets.

Dual Data Pointers

The dual Data Pointers (DPTR) adds to the ways in which the processor can specify the address used with certain instructions.
The DPS bit in the AUXR1 register selects one of the two Data Pointers. The DPTR that is not currently selected is not accessible
to software unless the DPS bit is toggled.
Specific instructions affected by the Data Pointer selection are:
• INC
DPTR
• JMP @A+DPTR
2003 Dec 8
7
6
CLKLP
EBRR
FUNCTION
Clock Low Power Select. When set, reduces power consumption in the clock circuits. Can
be used when the clock frequency is 8MHz or less. After reset this bit is cleared to support
up to 12MHz operation (P89LPC901).
UART Break Detect Reset Enable. If '1', UART Break Detect will cause a chip reset
(P89LPC903). When writing to this register on the P89LPC901 or P89LPC902 devices,
this bit position should be written with a zero.
Reserved
Reserved
Software Reset. When set by software, resets the P89LPC901/902/903 as if a hardware
reset occurred.
This bit contains a hard-wired 0. Allows toggling of the DPS bit by incrementing AUXR1,
without interfering with other bits in the register.
Not used. Allowable to set to a "1" .
Data Pointer Select. Chooses one of two Data Pointers.
Figure 13-1: AUXR1 Register
Increments the Data Pointer by 1.
Jump indirect relative to DPTR value.
5
4
3
-
-
SRST
91
User's Manual - Preliminary -
P89LPC901/902/903
2
1
0
0
-
DPS

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